Re: [Qemu-devel] [PATCH v3 13/27] tcg-ppc64: Improve and_i64 with constant

[Aurelien Jarno <aurelien@aurel32.net>]

On Mon, Apr 01, 2013 at 09:23:16PM -0700, Richard Henderson wrote:
> Use RLDICL and RLDICR.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/ppc64/tcg-target.c | 64 +++++++++++++++++++++++++++++++++++++++-----------
>  1 file changed, 50 insertions(+), 14 deletions(-)
> 
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index ad6db6c..51a5545 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -527,7 +527,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret,
>      }
>  }
>  
> -static inline bool mask_operand(uint32_t c, int *mb, int *me)
> +static bool mask_operand(uint32_t c, int *mb, int *me)
>  {
>      uint32_t lsb, test;
>  
> @@ -551,6 +551,30 @@ static inline bool mask_operand(uint32_t c, int *mb, int *me)
>      return true;
>  }
>  
> +static bool mask64_operand(uint64_t c, int *mb, int *me)
> +{
> +    uint64_t lsb;
> +
> +    if (c == 0) {
> +        return false;
> +    }
> +
> +    lsb = c & -c;
> +    /* Accept 1..10..0.  */
> +    if (c == -lsb) {
> +        *mb = 0;
> +        *me = clz64(lsb);
> +        return true;
> +    }
> +    /* Accept 0..01..1.  */
> +    if (lsb == 1 && (c & (c + 1)) == 0) {
> +        *mb = clz64(c + 1) + 1;
> +        *me = 63;
> +        return true;
> +    }
> +    return false;
> +}
> +
>  static void tcg_out_andi32(TCGContext *s, TCGReg dst, TCGReg src, uint32_t c)
>  {
>      int mb, me;
> @@ -569,6 +593,28 @@ static void tcg_out_andi32(TCGContext *s, TCGReg dst, TCGReg src, uint32_t c)
>      }
>  }
>  
> +static void tcg_out_andi64(TCGContext *s, TCGReg dst, TCGReg src, uint64_t c)
> +{
> +    int mb, me;
> +
> +    if ((c & 0xffff) == c) {
> +        tcg_out32(s, ANDI | SAI(src, dst, c));
> +        return;
> +    } else if ((c & 0xffff0000) == c) {
> +        tcg_out32(s, ANDIS | SAI(src, dst, c >> 16));
> +        return;
> +    } else if (mask64_operand(c, &mb, &me)) {
> +        if (mb == 0) {
> +            tcg_out_rld(s, RLDICR, dst, src, 0, me);
> +        } else {
> +            tcg_out_rld(s, RLDICL, dst, src, 0, mb);
> +        }
> +    } else {
> +        tcg_out_movi(s, TCG_TYPE_I64, 0, c);
> +        tcg_out32(s, AND | SAB(src, dst, 0));
> +    }
> +}
> +
>  static void tcg_out_zori32(TCGContext *s, TCGReg dst, TCGReg src, uint32_t c,
>                             int op_lo, int op_hi)
>  {
> @@ -1397,20 +1443,10 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
>          break;
>      case INDEX_op_and_i64:
>          if (const_args[2]) {
> -            if ((args[2] & 0xffff) == args[2]) {
> -                tcg_out32(s, ANDI | SAI(args[1], args[0], args[2]));
> -            } else if ((args[2] & 0xffff0000) == args[2]) {
> -                tcg_out32(s, ANDIS | SAI(args[1], args[0], args[2] >> 16));
> -            } else {
> -                tcg_out_movi (s, (opc == INDEX_op_and_i32
> -                                  ? TCG_TYPE_I32
> -                                  : TCG_TYPE_I64),
> -                              0, args[2]);
> -                tcg_out32 (s, AND | SAB (args[1], args[0], 0));
> -            }
> +            tcg_out_andi64(s, args[0], args[1], args[2]);
> +        } else {
> +            tcg_out32(s, AND | SAB(args[1], args[0], args[2]));
>          }
> -        else
> -            tcg_out32 (s, AND | SAB (args[1], args[0], args[2]));
>          break;
>      case INDEX_op_or_i64:
>      case INDEX_op_or_i32:

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net