From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
jacob.shin@amd.com, haitao.shan@intel.com,
dietmar.hahn@ts.fujitsu.com, xen-devel@lists.xen.org,
jun.nakajima@intel.com
Subject: Re: [PATCH 3/8] x86/AMD: Read VPMU MSRs from context when it is not loaded into HW
Date: Tue, 16 Apr 2013 11:41:51 -0400 [thread overview]
Message-ID: <20130416154151.GD2799@phenom.dumpdata.com> (raw)
In-Reply-To: <51670247.1090409@oracle.com>
On Thu, Apr 11, 2013 at 02:34:47PM -0400, Boris Ostrovsky wrote:
> On 04/11/2013 02:26 PM, Suravee Suthikulpanit wrote:
> >Boris,
> >
> >I tried booting the guest HVM after the patch, I still see PERF
> >only working in Software mode only. I'll look more into this.
>
> You may need to declare proper CPUID bits in the config file. On
> fam15h I have
>
> cpuid=['0x80000001:ecx=00000001101000011000101111110011']
Would it be possible to write somewhere this magic incantention?
Perhaps in the xl.cfg.pod.5 ?
(This of course being a different patch).
next prev parent reply other threads:[~2013-04-16 15:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-09 17:26 [PATCH 0/8] Various VPMU patches Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 1/8] x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 2/8] x86/AMD: Do not intercept access to performance counters MSRs Boris Ostrovsky
2013-04-10 13:25 ` Jan Beulich
2013-04-09 17:26 ` [PATCH 3/8] x86/AMD: Read VPMU MSRs from context when it is not loaded into HW Boris Ostrovsky
2013-04-11 18:26 ` Suravee Suthikulpanit
2013-04-11 18:34 ` Boris Ostrovsky
2013-04-11 19:30 ` Suravee Suthikulpanit
2013-04-16 15:41 ` Konrad Rzeszutek Wilk [this message]
2013-04-16 17:12 ` Jacob Shin
2013-04-16 18:36 ` Konrad Rzeszutek Wilk
2013-06-19 22:56 ` Suravee Suthikulanit
2013-06-19 23:32 ` Boris Ostrovsky
2013-06-19 23:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 4/8] x86/AMD: Stop counters on VPMU save Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 5/8] x86/VPMU: Add Haswell support Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 6/8] x86/VPMU: Factor out VPMU common code Boris Ostrovsky
2013-04-10 16:03 ` Nakajima, Jun
2013-04-09 17:26 ` [PATCH 7/8] x86/VPMU: Save/restore VPMU only when necessary Boris Ostrovsky
2013-04-10 8:57 ` Dietmar Hahn
2013-04-10 12:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 8/8] x86/AMD: Clean up context_update() in AMD VPMU code Boris Ostrovsky
2013-04-11 19:48 ` Suravee Suthikulpanit
2013-04-11 20:42 ` Boris Ostrovsky
2013-04-10 8:57 ` [PATCH 0/8] Various VPMU patches Dietmar Hahn
2013-04-10 18:49 ` Suravee Suthikulanit
2013-04-10 19:10 ` Boris Ostrovsky
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