Re: [PATCH 07/15] drm/i915: Fixup non-24bpp support for VGA screens on Haswell

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 07/15] drm/i915: Fixup non-24bpp support for VGA screens on Haswell
Date: Wed, 24 Apr 2013 14:12:55 +0300	[thread overview]
Message-ID: <20130424111255.GK4469@intel.com> (raw)
In-Reply-To: <1366363487-15926-8-git-send-email-daniel.vetter@ffwll.ch>

On Fri, Apr 19, 2013 at 11:24:39AM +0200, Daniel Vetter wrote:
> The LPT PCH only supports 8bpc, so we need to force the pipe bpp
> to the right value.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_crt.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 58b4a53..1b9ebf4 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -207,6 +207,10 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder,
>  	if (HAS_PCH_SPLIT(dev))
>  		pipe_config->has_pch_encoder = true;
>  
> +	/* LPT FDI RX only supports 8bpc. */
> +	if (HAS_PCH_LPT(dev))
> +		pipe_config->pipe_bpp = 24;
> +
>  	return true;
>  }
>  
> -- 
> 1.7.11.7
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC