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From: Ingo Molnar <mingo@kernel.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org,
	Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Arnaldo Carvalho de Melo <acme@infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andrew Morton <akpm@linux-foundation.org>
Subject: Re: Basic perf PMU support for Haswell v11
Date: Fri, 26 Apr 2013 08:59:26 +0200	[thread overview]
Message-ID: <20130426065926.GA31487@gmail.com> (raw)
In-Reply-To: <20130426065503.GA31197@gmail.com>


* Ingo Molnar <mingo@kernel.org> wrote:

> You say it's barebones, yet it does not work :-( How well was this 
> patch-set tested on non-Haswell hardware, which makes up 99.99% of our 
> installed base?
> 
> In particular, after applying your patches, 'perf top' stopped working 
> on an Intel testbox of mine:

The other problem I noticed was stylistic: when I applied your patches for 
testing even Git complained about their cleanliness ...

To quote from Documentation/SubmittingPatches:

  4) Style check your changes.

  Check your patch for basic style violations, details of which can be
  found in Documentation/CodingStyle.  Failure to do so simply wastes
  the reviewers time and will get your patch rejected, probably
  without even being read.

  At a minimum you should check your patches with the patch style
  checker prior to submission (scripts/checkpatch.pl).  You should
  be able to justify all violations that remain in your patch.

Please make your patches less sloppy!

Thanks,

	Ingo

  reply	other threads:[~2013-04-26  6:59 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-20 19:06 Basic perf PMU support for Haswell v11 Andi Kleen
2013-04-20 19:06 ` [PATCH 1/5] perf, x86: Add Haswell PEBS record support v5 Andi Kleen
2013-04-20 19:06 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v8 Andi Kleen
2013-04-20 19:06 ` [PATCH 3/5] perf, x86: Basic Haswell PEBS support v4 Andi Kleen
2013-04-20 19:06 ` [PATCH 4/5] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-04-20 19:06 ` [PATCH 5/5] perf, x86: Support Haswell v4 LBR format v2 Andi Kleen
2013-09-03 19:25   ` Vince Weaver
2013-09-03 20:28     ` Andi Kleen
2013-09-03 21:14       ` Vince Weaver
2013-09-03 22:37         ` Andi Kleen
2013-09-04 14:21           ` Vince Weaver
2013-09-04 17:05             ` Andi Kleen
2013-04-26  6:55 ` Basic perf PMU support for Haswell v11 Ingo Molnar
2013-04-26  6:59   ` Ingo Molnar [this message]
2013-05-01 10:48     ` Ingo Molnar
2013-04-26 22:52   ` Andi Kleen
2013-05-01 10:10     ` Your action on perf bug report is requested was " Andi Kleen
2013-05-01 10:33       ` Ingo Molnar
2013-05-02  8:38     ` Ingo Molnar
2013-05-02  8:49 ` Ingo Molnar

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