* [PATCH v2] clk: exynos4: Add clock entries for TMU
@ 2013-04-22 3:55 Sachin Kamat
2013-04-29 10:34 ` Sachin Kamat
2013-04-29 17:00 ` Mike Turquette
0 siblings, 2 replies; 8+ messages in thread
From: Sachin Kamat @ 2013-04-22 3:55 UTC (permalink / raw)
To: linux-samsung-soc
Cc: kgene.kim, sachin.kamat, patches, Thomas Abraham, Mike Turquette
Added clock entries for thermal management unit (TMU) for
Exynos4 SoCs.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Mike Turquette <mturquette@linaro.org>
---
Should be applied on top of the below patches:
https://patchwork.kernel.org/patch/2448711/
https://patchwork.kernel.org/patch/2459831/
Changes since v1:
Changed clock name 'tmu' to 'tmu_apbif' as per the SoC user manual.
---
.../devicetree/bindings/clock/exynos4-clock.txt | 1 +
drivers/clk/samsung/clk-exynos4.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
index 14d5c2a..8fc1151 100644
--- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
@@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
spi0_isp_sclk 380 Exynos4x12
spi1_isp_sclk 381 Exynos4x12
uart_isp_sclk 382 Exynos4x12
+ tmu_apbif 383
[Mux Clocks]
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 09cf161..0be7d05 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -170,7 +170,7 @@ enum exynos4_clks {
gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp,
mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp,
asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk,
- spi1_isp_sclk, uart_isp_sclk,
+ spi1_isp_sclk, uart_isp_sclk, tmu_apbif,
/* mux clocks */
mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0,
@@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"),
GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1",
E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"),
+ GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0),
};
/* list of gate clocks supported in exynos4x12 soc */
@@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13,
CLK_IGNORE_UNUSED, 0),
GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
+ GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0),
};
#ifdef CONFIG_OF
--
1.7.9.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-04-22 3:55 [PATCH v2] clk: exynos4: Add clock entries for TMU Sachin Kamat
@ 2013-04-29 10:34 ` Sachin Kamat
2013-04-29 17:00 ` Mike Turquette
1 sibling, 0 replies; 8+ messages in thread
From: Sachin Kamat @ 2013-04-29 10:34 UTC (permalink / raw)
To: linux-samsung-soc
Cc: kgene.kim, sachin.kamat, patches, Thomas Abraham, Mike Turquette
On 22 April 2013 09:25, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> Added clock entries for thermal management unit (TMU) for
> Exynos4 SoCs.
>
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> Cc: Thomas Abraham <thomas.abraham@linaro.org>
> Cc: Mike Turquette <mturquette@linaro.org>
> ---
> Should be applied on top of the below patches:
> https://patchwork.kernel.org/patch/2448711/
> https://patchwork.kernel.org/patch/2459831/
>
> Changes since v1:
> Changed clock name 'tmu' to 'tmu_apbif' as per the SoC user manual.
> ---
> .../devicetree/bindings/clock/exynos4-clock.txt | 1 +
> drivers/clk/samsung/clk-exynos4.c | 4 +++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> index 14d5c2a..8fc1151 100644
> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
> spi0_isp_sclk 380 Exynos4x12
> spi1_isp_sclk 381 Exynos4x12
> uart_isp_sclk 382 Exynos4x12
> + tmu_apbif 383
>
> [Mux Clocks]
>
> diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
> index 09cf161..0be7d05 100644
> --- a/drivers/clk/samsung/clk-exynos4.c
> +++ b/drivers/clk/samsung/clk-exynos4.c
> @@ -170,7 +170,7 @@ enum exynos4_clks {
> gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp,
> mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp,
> asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk,
> - spi1_isp_sclk, uart_isp_sclk,
> + spi1_isp_sclk, uart_isp_sclk, tmu_apbif,
>
> /* mux clocks */
> mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0,
> @@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
> GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"),
> GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1",
> E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"),
> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0),
> };
>
> /* list of gate clocks supported in exynos4x12 soc */
> @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
> GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13,
> CLK_IGNORE_UNUSED, 0),
> GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0),
> };
>
> #ifdef CONFIG_OF
> --
> 1.7.9.5
>
Ping...
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-04-22 3:55 [PATCH v2] clk: exynos4: Add clock entries for TMU Sachin Kamat
2013-04-29 10:34 ` Sachin Kamat
@ 2013-04-29 17:00 ` Mike Turquette
2013-06-07 9:54 ` Sachin Kamat
2013-06-10 8:51 ` Sachin Kamat
1 sibling, 2 replies; 8+ messages in thread
From: Mike Turquette @ 2013-04-29 17:00 UTC (permalink / raw)
To: linux-samsung-soc; +Cc: kgene.kim, sachin.kamat, patches, Thomas Abraham
Quoting Sachin Kamat (2013-04-21 20:55:46)
> Added clock entries for thermal management unit (TMU) for
> Exynos4 SoCs.
>
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> Cc: Thomas Abraham <thomas.abraham@linaro.org>
> Cc: Mike Turquette <mturquette@linaro.org>
This has my Ack if you plan to take it through the Samsung tree.
If you want it to go through the clk tree then I can take it in after
3.10-rc1.
Regards,
Mike
> ---
> Should be applied on top of the below patches:
> https://patchwork.kernel.org/patch/2448711/
> https://patchwork.kernel.org/patch/2459831/
>
> Changes since v1:
> Changed clock name 'tmu' to 'tmu_apbif' as per the SoC user manual.
> ---
> .../devicetree/bindings/clock/exynos4-clock.txt | 1 +
> drivers/clk/samsung/clk-exynos4.c | 4 +++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> index 14d5c2a..8fc1151 100644
> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
> @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
> spi0_isp_sclk 380 Exynos4x12
> spi1_isp_sclk 381 Exynos4x12
> uart_isp_sclk 382 Exynos4x12
> + tmu_apbif 383
>
> [Mux Clocks]
>
> diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
> index 09cf161..0be7d05 100644
> --- a/drivers/clk/samsung/clk-exynos4.c
> +++ b/drivers/clk/samsung/clk-exynos4.c
> @@ -170,7 +170,7 @@ enum exynos4_clks {
> gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp,
> mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp,
> asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk,
> - spi1_isp_sclk, uart_isp_sclk,
> + spi1_isp_sclk, uart_isp_sclk, tmu_apbif,
>
> /* mux clocks */
> mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0,
> @@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
> GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"),
> GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1",
> E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"),
> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0),
> };
>
> /* list of gate clocks supported in exynos4x12 soc */
> @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
> GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13,
> CLK_IGNORE_UNUSED, 0),
> GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0),
> };
>
> #ifdef CONFIG_OF
> --
> 1.7.9.5
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-04-29 17:00 ` Mike Turquette
@ 2013-06-07 9:54 ` Sachin Kamat
2013-06-10 8:51 ` Sachin Kamat
1 sibling, 0 replies; 8+ messages in thread
From: Sachin Kamat @ 2013-06-07 9:54 UTC (permalink / raw)
To: Mike Turquette, Kukjin Kim; +Cc: linux-samsung-soc
On 29 April 2013 22:30, Mike Turquette <mturquette@linaro.org> wrote:
> Quoting Sachin Kamat (2013-04-21 20:55:46)
>> Added clock entries for thermal management unit (TMU) for
>> Exynos4 SoCs.
>>
>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
>> Cc: Thomas Abraham <thomas.abraham@linaro.org>
>> Cc: Mike Turquette <mturquette@linaro.org>
>
> This has my Ack if you plan to take it through the Samsung tree.
> If you want it to go through the clk tree then I can take it in after
> 3.10-rc1.
Ping Kukjin..
>
> Regards,
> Mike
>
>> ---
>> Should be applied on top of the below patches:
>> https://patchwork.kernel.org/patch/2448711/
>> https://patchwork.kernel.org/patch/2459831/
>>
>> Changes since v1:
>> Changed clock name 'tmu' to 'tmu_apbif' as per the SoC user manual.
>> ---
>> .../devicetree/bindings/clock/exynos4-clock.txt | 1 +
>> drivers/clk/samsung/clk-exynos4.c | 4 +++-
>> 2 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> index 14d5c2a..8fc1151 100644
>> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
>> spi0_isp_sclk 380 Exynos4x12
>> spi1_isp_sclk 381 Exynos4x12
>> uart_isp_sclk 382 Exynos4x12
>> + tmu_apbif 383
>>
>> [Mux Clocks]
>>
>> diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
>> index 09cf161..0be7d05 100644
>> --- a/drivers/clk/samsung/clk-exynos4.c
>> +++ b/drivers/clk/samsung/clk-exynos4.c
>> @@ -170,7 +170,7 @@ enum exynos4_clks {
>> gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp,
>> mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp,
>> asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk,
>> - spi1_isp_sclk, uart_isp_sclk,
>> + spi1_isp_sclk, uart_isp_sclk, tmu_apbif,
>>
>> /* mux clocks */
>> mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0,
>> @@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
>> GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"),
>> GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1",
>> E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"),
>> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0),
>> };
>>
>> /* list of gate clocks supported in exynos4x12 soc */
>> @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
>> GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13,
>> CLK_IGNORE_UNUSED, 0),
>> GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
>> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0),
>> };
>>
>> #ifdef CONFIG_OF
>> --
>> 1.7.9.5
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-04-29 17:00 ` Mike Turquette
2013-06-07 9:54 ` Sachin Kamat
@ 2013-06-10 8:51 ` Sachin Kamat
2013-06-17 3:12 ` Sachin Kamat
1 sibling, 1 reply; 8+ messages in thread
From: Sachin Kamat @ 2013-06-10 8:51 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-samsung-soc, Mike Turquette
Hi Kukjin,
On 29 April 2013 22:30, Mike Turquette <mturquette@linaro.org> wrote:
> Quoting Sachin Kamat (2013-04-21 20:55:46)
>> Added clock entries for thermal management unit (TMU) for
>> Exynos4 SoCs.
>>
>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
>> Cc: Thomas Abraham <thomas.abraham@linaro.org>
>> Cc: Mike Turquette <mturquette@linaro.org>
>
> This has my Ack if you plan to take it through the Samsung tree.
> If you want it to go through the clk tree then I can take it in after
> 3.10-rc1.
Can you apply this one too to Samsung tree?
Thanks.
>
>> ---
>> Should be applied on top of the below patches:
>> https://patchwork.kernel.org/patch/2448711/
>> https://patchwork.kernel.org/patch/2459831/
>>
>> Changes since v1:
>> Changed clock name 'tmu' to 'tmu_apbif' as per the SoC user manual.
>> ---
>> .../devicetree/bindings/clock/exynos4-clock.txt | 1 +
>> drivers/clk/samsung/clk-exynos4.c | 4 +++-
>> 2 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> index 14d5c2a..8fc1151 100644
>> --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
>> @@ -236,6 +236,7 @@ Exynos4 SoC and this is specified where applicable.
>> spi0_isp_sclk 380 Exynos4x12
>> spi1_isp_sclk 381 Exynos4x12
>> uart_isp_sclk 382 Exynos4x12
>> + tmu_apbif 383
>>
>> [Mux Clocks]
>>
>> diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
>> index 09cf161..0be7d05 100644
>> --- a/drivers/clk/samsung/clk-exynos4.c
>> +++ b/drivers/clk/samsung/clk-exynos4.c
>> @@ -170,7 +170,7 @@ enum exynos4_clks {
>> gicisp, smmu_isp, smmu_drc, smmu_fd, smmu_lite0, smmu_lite1, mcuctl_isp,
>> mpwm_isp, i2c0_isp, i2c1_isp, mtcadc_isp, pwm_isp, wdt_isp, uart_isp,
>> asyncaxim, smmu_ispcx, spi0_isp, spi1_isp, pwm_isp_sclk, spi0_isp_sclk,
>> - spi1_isp_sclk, uart_isp_sclk,
>> + spi1_isp_sclk, uart_isp_sclk, tmu_apbif,
>>
>> /* mux clocks */
>> mout_fimc0 = 384, mout_fimc1, mout_fimc2, mout_fimc3, mout_cam0,
>> @@ -815,6 +815,7 @@ static struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
>> GATE_A(keyif, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16, 0, 0, "keypad"),
>> GATE_DA(sclk_fimd1, "exynos4-fb.1", "sclk_fimd1", "div_fimd1",
>> E4210_SRC_MASK_LCD1, 0, CLK_SET_RATE_PARENT, 0, "sclk_fimd"),
>> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0, 0),
>> };
>>
>> /* list of gate clocks supported in exynos4x12 soc */
>> @@ -915,6 +916,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
>> GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13,
>> CLK_IGNORE_UNUSED, 0),
>> GATE(g2d, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
>> + GATE(tmu_apbif, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0),
>> };
>>
>> #ifdef CONFIG_OF
>> --
>> 1.7.9.5
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-06-10 8:51 ` Sachin Kamat
@ 2013-06-17 3:12 ` Sachin Kamat
2013-06-17 12:07 ` Kukjin Kim
0 siblings, 1 reply; 8+ messages in thread
From: Sachin Kamat @ 2013-06-17 3:12 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-samsung-soc, Mike Turquette
On 10 June 2013 14:21, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> Hi Kukjin,
>
> On 29 April 2013 22:30, Mike Turquette <mturquette@linaro.org> wrote:
>> Quoting Sachin Kamat (2013-04-21 20:55:46)
>>> Added clock entries for thermal management unit (TMU) for
>>> Exynos4 SoCs.
>>>
>>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
>>> Cc: Thomas Abraham <thomas.abraham@linaro.org>
>>> Cc: Mike Turquette <mturquette@linaro.org>
>>
>> This has my Ack if you plan to take it through the Samsung tree.
>> If you want it to go through the clk tree then I can take it in after
>> 3.10-rc1.
>
> Can you apply this one too to Samsung tree?
> Thanks.
Kukjin,
Can you please take this through your tree? This alreday has MIke's Ack.
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-06-17 3:12 ` Sachin Kamat
@ 2013-06-17 12:07 ` Kukjin Kim
2013-06-18 5:15 ` Sachin Kamat
0 siblings, 1 reply; 8+ messages in thread
From: Kukjin Kim @ 2013-06-17 12:07 UTC (permalink / raw)
To: 'Sachin Kamat'; +Cc: linux-samsung-soc, 'Mike Turquette'
Sachin Kamat wrote:
>
> On 10 June 2013 14:21, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> > Hi Kukjin,
> >
> > On 29 April 2013 22:30, Mike Turquette <mturquette@linaro.org> wrote:
> >> Quoting Sachin Kamat (2013-04-21 20:55:46)
> >>> Added clock entries for thermal management unit (TMU) for
> >>> Exynos4 SoCs.
> >>>
> >>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> >>> Cc: Thomas Abraham <thomas.abraham@linaro.org>
> >>> Cc: Mike Turquette <mturquette@linaro.org>
> >>
> >> This has my Ack if you plan to take it through the Samsung tree.
> >> If you want it to go through the clk tree then I can take it in after
> >> 3.10-rc1.
> >
> > Can you apply this one too to Samsung tree?
> > Thanks.
>
> Kukjin,
>
> Can you please take this through your tree? This alreday has MIke's Ack.
>
Sure, I've applied with Mike's ack.
Thanks,
- Kukjin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] clk: exynos4: Add clock entries for TMU
2013-06-17 12:07 ` Kukjin Kim
@ 2013-06-18 5:15 ` Sachin Kamat
0 siblings, 0 replies; 8+ messages in thread
From: Sachin Kamat @ 2013-06-18 5:15 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-samsung-soc, Mike Turquette
On 17 June 2013 17:37, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Sachin Kamat wrote:
>>
>> On 10 June 2013 14:21, Sachin Kamat <sachin.kamat@linaro.org> wrote:
>> > Hi Kukjin,
>> >
>> > On 29 April 2013 22:30, Mike Turquette <mturquette@linaro.org> wrote:
>> >> Quoting Sachin Kamat (2013-04-21 20:55:46)
>> >>> Added clock entries for thermal management unit (TMU) for
>> >>> Exynos4 SoCs.
>> >>>
>> >>> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
>> >>> Cc: Thomas Abraham <thomas.abraham@linaro.org>
>> >>> Cc: Mike Turquette <mturquette@linaro.org>
>> >>
>> >> This has my Ack if you plan to take it through the Samsung tree.
>> >> If you want it to go through the clk tree then I can take it in after
>> >> 3.10-rc1.
>> >
>> > Can you apply this one too to Samsung tree?
>> > Thanks.
>>
>> Kukjin,
>>
>> Can you please take this through your tree? This alreday has MIke's Ack.
>>
> Sure, I've applied with Mike's ack.
Thanks. But did not find this in your for-next yet. Not pushed out yet?
Also, please add the following series too.
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/17942
--
With warm regards,
Sachin
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-06-18 5:15 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-04-22 3:55 [PATCH v2] clk: exynos4: Add clock entries for TMU Sachin Kamat
2013-04-29 10:34 ` Sachin Kamat
2013-04-29 17:00 ` Mike Turquette
2013-06-07 9:54 ` Sachin Kamat
2013-06-10 8:51 ` Sachin Kamat
2013-06-17 3:12 ` Sachin Kamat
2013-06-17 12:07 ` Kukjin Kim
2013-06-18 5:15 ` Sachin Kamat
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