From: Tony Lindgren <tony@atomide.com>
To: Russ Dill <Russ.Dill@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Vaibhav Bedia <vaibhav.bedia@ti.com>,
Linux ARM Kernel List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC 1/2] ARM: OMAP2+: AM33XX: I2C Sleep/wake sequence support
Date: Wed, 1 May 2013 16:54:08 -0700 [thread overview]
Message-ID: <20130501235407.GO28721@atomide.com> (raw)
In-Reply-To: <CA+Bv8XYGa0c9+6DawMerDUnZnD_0fEESJZeQLDG6MuJrLPYV0Q@mail.gmail.com>
* Russ Dill <Russ.Dill@ti.com> [130501 16:43]:
> On Wed, May 1, 2013 at 4:26 PM, Tony Lindgren <tony@atomide.com> wrote:
> >
> > Looks like you should make that into just a regular device driver that lives
> > under drivers/ somewhere?
>
> This code has to be copied to, and run from SRAM. What would that even
> look like? Additionally, there is also code under drivers/ that
> manages this piece of hardware, i2c-omap.c. The code in this patch
> differs in that it accesses no system memory, no stack, only knows how
> to write, and it runs without interrupts.
Well we should move to using the generic drivers/misc/sram.c, so
you should be able to load the code to SRAM using that. Then you
can probably register some callback function based on the compatible
flag with i2c-omap.c?
Regards,
Tony
WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 1/2] ARM: OMAP2+: AM33XX: I2C Sleep/wake sequence support
Date: Wed, 1 May 2013 16:54:08 -0700 [thread overview]
Message-ID: <20130501235407.GO28721@atomide.com> (raw)
In-Reply-To: <CA+Bv8XYGa0c9+6DawMerDUnZnD_0fEESJZeQLDG6MuJrLPYV0Q@mail.gmail.com>
* Russ Dill <Russ.Dill@ti.com> [130501 16:43]:
> On Wed, May 1, 2013 at 4:26 PM, Tony Lindgren <tony@atomide.com> wrote:
> >
> > Looks like you should make that into just a regular device driver that lives
> > under drivers/ somewhere?
>
> This code has to be copied to, and run from SRAM. What would that even
> look like? Additionally, there is also code under drivers/ that
> manages this piece of hardware, i2c-omap.c. The code in this patch
> differs in that it accesses no system memory, no stack, only knows how
> to write, and it runs without interrupts.
Well we should move to using the generic drivers/misc/sram.c, so
you should be able to load the code to SRAM using that. Then you
can probably register some callback function based on the compatible
flag with i2c-omap.c?
Regards,
Tony
next prev parent reply other threads:[~2013-05-01 23:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-01 19:02 [RFC 0/2] am33xx 0.950V core sleep mode Russ Dill
2013-05-01 19:02 ` Russ Dill
2013-05-01 19:02 ` [RFC 1/2] ARM: OMAP2+: AM33XX: I2C Sleep/wake sequence support Russ Dill
2013-05-01 23:26 ` Tony Lindgren
2013-05-01 23:26 ` Tony Lindgren
2013-05-01 23:37 ` Russ Dill
2013-05-01 23:37 ` Russ Dill
2013-05-01 23:54 ` Tony Lindgren [this message]
2013-05-01 23:54 ` Tony Lindgren
2013-05-01 19:02 ` [RFC 2/2] ARM: dts: add AM33XX vdd core opp50 suspend for Beaglebone Russ Dill
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