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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Oliver Schinagl <oliver+list-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>
Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
	kevin-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org,
	sunny-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org,
	shuge-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org,
	linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCHv2 1/6] i2c: sunxi: Add Allwinner A1X i2c driver
Date: Mon, 27 May 2013 12:04:53 +0200	[thread overview]
Message-ID: <20130527100453.GM17847@lukather> (raw)
In-Reply-To: <51A25C21.2060700-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>

Hi Oliver,

On Sun, May 26, 2013 at 09:01:53PM +0200, Oliver Schinagl wrote:
> On 05/26/13 15:21, Maxime Ripard wrote:
> >For the iowrite* vs write*, there's no consensus, and as such no
> >preferred way. write* functions are doing an MMIO only access,
> >while iowrite functions can do MMIO and port I/O accesses.
> >
> >Note that it doesn't change anything on ARM, since there's no port IO on
> >ARM.
> Ah I see, missinformation on my end. Sorry.
> 
> But why write 32 bits? The register is only 8 wide, with the rest
> being 'reserved'. Then again, the register IS 32 bits wide and
> probably will haev 32 bits written to it? Correct?

Yes, the register is 32 bits wide. However, and I didn't noticed it at
first, that all the registers have the 3 upper bytes reserved.

But you'll end up writing a 32 bits value to a 32 bit register register
anyway, even if the relevant information is contained in the 8 first
bits.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] [PATCHv2 1/6] i2c: sunxi: Add Allwinner A1X i2c driver
Date: Mon, 27 May 2013 12:04:53 +0200	[thread overview]
Message-ID: <20130527100453.GM17847@lukather> (raw)
In-Reply-To: <51A25C21.2060700@schinagl.nl>

Hi Oliver,

On Sun, May 26, 2013 at 09:01:53PM +0200, Oliver Schinagl wrote:
> On 05/26/13 15:21, Maxime Ripard wrote:
> >For the iowrite* vs write*, there's no consensus, and as such no
> >preferred way. write* functions are doing an MMIO only access,
> >while iowrite functions can do MMIO and port I/O accesses.
> >
> >Note that it doesn't change anything on ARM, since there's no port IO on
> >ARM.
> Ah I see, missinformation on my end. Sorry.
> 
> But why write 32 bits? The register is only 8 wide, with the rest
> being 'reserved'. Then again, the register IS 32 bits wide and
> probably will haev 32 bits written to it? Correct?

Yes, the register is 32 bits wide. However, and I didn't noticed it at
first, that all the registers have the 3 upper bytes reserved.

But you'll end up writing a 32 bits value to a 32 bit register register
anyway, even if the relevant information is contained in the 8 first
bits.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

  parent reply	other threads:[~2013-05-27 10:04 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-26 10:20 [PATCHv2 0/6] Add I2C support for Allwinner SoCs Maxime Ripard
2013-05-26 10:20 ` Maxime Ripard
     [not found] ` <1369563642-4390-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-05-26 10:20   ` [PATCHv2 1/6] i2c: sunxi: Add Allwinner A1X i2c driver Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard
     [not found]     ` <1369563642-4390-2-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-05-26 10:53       ` Oliver Schinagl
2013-05-26 10:53         ` [linux-sunxi] " Oliver Schinagl
     [not found]         ` <51A1E9AA.4000008-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>
2013-05-26 13:21           ` Maxime Ripard
2013-05-26 13:21             ` Maxime Ripard
2013-05-26 19:01             ` Oliver Schinagl
2013-05-26 19:01               ` [linux-sunxi] " Oliver Schinagl
     [not found]               ` <51A25C21.2060700-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>
2013-05-27 10:04                 ` Maxime Ripard [this message]
2013-05-27 10:04                   ` Maxime Ripard
2013-05-26 14:44           ` Tomasz Figa
2013-05-26 14:44             ` Tomasz Figa
2013-05-26 19:05             ` Oliver Schinagl
2013-05-26 19:05               ` Oliver Schinagl
2013-05-26 14:38       ` Tomasz Figa
2013-05-26 14:38         ` Tomasz Figa
2013-05-26 17:00         ` Maxime Ripard
2013-05-26 17:00           ` Maxime Ripard
2013-05-26 10:20   ` [PATCHv2 2/6] ARM: sunxi: dt: Add i2c controller nodes to the DTSI Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard
2013-05-26 10:20   ` [PATCHv2 3/6] ARM: sun4i: dt: Add i2c muxing options Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard
2013-05-26 10:20   ` [PATCHv2 4/6] ARM: sun5i: " Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard
2013-05-26 10:20   ` [PATCHv2 5/6] ARM: sun5i: olinuxino: Enable the i2c controllers Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard
2013-05-26 10:20   ` [PATCHv2 6/6] ARM: sun4i: cubieboard: " Maxime Ripard
2013-05-26 10:20     ` Maxime Ripard

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