* [PATCH 0/2] IPU generic irq chip @ 2013-06-21 12:52 ` Philipp Zabel 0 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel Hi, with linear domain support in the generic irq chip framework, we can drop the custom irq_chip / irq_domain_ops altogether and use the generic irq chip implementation instead. The following two patches depend on "genirq: Generic chip: Add linear irq domain support" and "genirq: irqchip: Add mask to block out invalid irqs": https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git/log/?id=e8bd834f73714378ef110a64287db1b77033c8da regards Philipp --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 101 ++++++++++------------------ 1 file changed, 37 insertions(+), 64 deletions(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/2] IPU generic irq chip @ 2013-06-21 12:52 ` Philipp Zabel 0 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel; +Cc: Greg Kroah-Hartman, Fabio Estevam, dri-devel, kernel Hi, with linear domain support in the generic irq chip framework, we can drop the custom irq_chip / irq_domain_ops altogether and use the generic irq chip implementation instead. The following two patches depend on "genirq: Generic chip: Add linear irq domain support" and "genirq: irqchip: Add mask to block out invalid irqs": https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git/log/?id=e8bd834f73714378ef110a64287db1b77033c8da regards Philipp --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 101 ++++++++++------------------ 1 file changed, 37 insertions(+), 64 deletions(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] staging: drm/imx: use generic irqchip 2013-06-21 12:52 ` Philipp Zabel @ 2013-06-21 12:52 ` Philipp Zabel -1 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel This depends on the patch "genirq: Generic chip: Add linear irq domain support" and removes the custom IPU irq_chip and irq_domain_ops. Instead, the generic irq chip implementation is reused. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 90 +++++++++-------------------- 1 file changed, 26 insertions(+), 64 deletions(-) diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index d629d6d..c135c66 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -986,53 +986,6 @@ static void ipu_err_irq_handler(unsigned int irq, struct irq_desc *desc) chained_irq_exit(chip, desc); } -static void ipu_ack_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - - ipu_cm_write(ipu, 1 << (irq % 32), IPU_INT_STAT(irq / 32)); -} - -static void ipu_unmask_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&ipu->lock, flags); - - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); - reg |= 1 << (irq % 32); - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); - - spin_unlock_irqrestore(&ipu->lock, flags); -} - -static void ipu_mask_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&ipu->lock, flags); - - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); - reg &= ~(1 << (irq % 32)); - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); - - spin_unlock_irqrestore(&ipu->lock, flags); -} - -static struct irq_chip ipu_irq_chip = { - .name = "IPU", - .irq_ack = ipu_ack_irq, - .irq_mask = ipu_mask_irq, - .irq_unmask = ipu_unmask_irq, -}; - int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel, enum ipu_channel_irq irq_type) { @@ -1171,32 +1124,39 @@ err_register: return ret; } -static int ipu_irq_map(struct irq_domain *h, unsigned int irq, - irq_hw_number_t hw) -{ - struct ipu_soc *ipu = h->host_data; - - irq_set_chip_and_handler(irq, &ipu_irq_chip, handle_level_irq); - set_irq_flags(irq, IRQF_VALID); - irq_set_chip_data(irq, ipu); - - return 0; -} - -const struct irq_domain_ops ipu_irq_domain_ops = { - .map = ipu_irq_map, - .xlate = irq_domain_xlate_onecell, -}; static int ipu_irq_init(struct ipu_soc *ipu) { + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + int ret, i; + ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, - &ipu_irq_domain_ops, ipu); + &irq_generic_chip_ops, ipu); if (!ipu->domain) { dev_err(ipu->dev, "failed to add irq domain\n"); return -ENODEV; } + ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU", + handle_level_irq, 0, IRQF_VALID, 0); + if (ret < 0) { + dev_err(ipu->dev, "failed to alloc generic irq chips\n"); + irq_domain_remove(ipu->domain); + return ret; + } + + for (i = 0; i < IPU_NUM_IRQS; i += 32) { + gc = irq_get_domain_generic_chip(ipu->domain, i); + gc->reg_base = ipu->cm_reg; + ct = gc->chip_types; + ct->chip.irq_ack = irq_gc_ack_set_bit; + ct->chip.irq_mask = irq_gc_mask_clr_bit; + ct->chip.irq_unmask = irq_gc_mask_set_bit; + ct->regs.ack = IPU_INT_STAT(i / 32); + ct->regs.mask = IPU_INT_CTRL(i / 32); + } + irq_set_chained_handler(ipu->irq_sync, ipu_irq_handler); irq_set_handler_data(ipu->irq_sync, ipu); irq_set_chained_handler(ipu->irq_err, ipu_err_irq_handler); @@ -1214,6 +1174,8 @@ static void ipu_irq_exit(struct ipu_soc *ipu) irq_set_chained_handler(ipu->irq_sync, NULL); irq_set_handler_data(ipu->irq_sync, NULL); + /* TODO: remove irq_domain_generic_chips */ + for (i = 0; i < IPU_NUM_IRQS; i++) { irq = irq_linear_revmap(ipu->domain, i); if (irq) -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] staging: drm/imx: use generic irqchip @ 2013-06-21 12:52 ` Philipp Zabel 0 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel; +Cc: kernel, Greg Kroah-Hartman, dri-devel, Fabio Estevam This depends on the patch "genirq: Generic chip: Add linear irq domain support" and removes the custom IPU irq_chip and irq_domain_ops. Instead, the generic irq chip implementation is reused. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 90 +++++++++-------------------- 1 file changed, 26 insertions(+), 64 deletions(-) diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index d629d6d..c135c66 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -986,53 +986,6 @@ static void ipu_err_irq_handler(unsigned int irq, struct irq_desc *desc) chained_irq_exit(chip, desc); } -static void ipu_ack_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - - ipu_cm_write(ipu, 1 << (irq % 32), IPU_INT_STAT(irq / 32)); -} - -static void ipu_unmask_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&ipu->lock, flags); - - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); - reg |= 1 << (irq % 32); - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); - - spin_unlock_irqrestore(&ipu->lock, flags); -} - -static void ipu_mask_irq(struct irq_data *d) -{ - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); - irq_hw_number_t irq = d->hwirq; - unsigned long flags; - u32 reg; - - spin_lock_irqsave(&ipu->lock, flags); - - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); - reg &= ~(1 << (irq % 32)); - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); - - spin_unlock_irqrestore(&ipu->lock, flags); -} - -static struct irq_chip ipu_irq_chip = { - .name = "IPU", - .irq_ack = ipu_ack_irq, - .irq_mask = ipu_mask_irq, - .irq_unmask = ipu_unmask_irq, -}; - int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel, enum ipu_channel_irq irq_type) { @@ -1171,32 +1124,39 @@ err_register: return ret; } -static int ipu_irq_map(struct irq_domain *h, unsigned int irq, - irq_hw_number_t hw) -{ - struct ipu_soc *ipu = h->host_data; - - irq_set_chip_and_handler(irq, &ipu_irq_chip, handle_level_irq); - set_irq_flags(irq, IRQF_VALID); - irq_set_chip_data(irq, ipu); - - return 0; -} - -const struct irq_domain_ops ipu_irq_domain_ops = { - .map = ipu_irq_map, - .xlate = irq_domain_xlate_onecell, -}; static int ipu_irq_init(struct ipu_soc *ipu) { + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + int ret, i; + ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, - &ipu_irq_domain_ops, ipu); + &irq_generic_chip_ops, ipu); if (!ipu->domain) { dev_err(ipu->dev, "failed to add irq domain\n"); return -ENODEV; } + ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU", + handle_level_irq, 0, IRQF_VALID, 0); + if (ret < 0) { + dev_err(ipu->dev, "failed to alloc generic irq chips\n"); + irq_domain_remove(ipu->domain); + return ret; + } + + for (i = 0; i < IPU_NUM_IRQS; i += 32) { + gc = irq_get_domain_generic_chip(ipu->domain, i); + gc->reg_base = ipu->cm_reg; + ct = gc->chip_types; + ct->chip.irq_ack = irq_gc_ack_set_bit; + ct->chip.irq_mask = irq_gc_mask_clr_bit; + ct->chip.irq_unmask = irq_gc_mask_set_bit; + ct->regs.ack = IPU_INT_STAT(i / 32); + ct->regs.mask = IPU_INT_CTRL(i / 32); + } + irq_set_chained_handler(ipu->irq_sync, ipu_irq_handler); irq_set_handler_data(ipu->irq_sync, ipu); irq_set_chained_handler(ipu->irq_err, ipu_err_irq_handler); @@ -1214,6 +1174,8 @@ static void ipu_irq_exit(struct ipu_soc *ipu) irq_set_chained_handler(ipu->irq_sync, NULL); irq_set_handler_data(ipu->irq_sync, NULL); + /* TODO: remove irq_domain_generic_chips */ + for (i = 0; i < IPU_NUM_IRQS; i++) { irq = irq_linear_revmap(ipu->domain, i); if (irq) -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] staging: drm/imx: use generic irqchip 2013-06-21 12:52 ` Philipp Zabel @ 2013-06-24 12:59 ` Grant Likely -1 siblings, 0 replies; 8+ messages in thread From: Grant Likely @ 2013-06-24 12:59 UTC (permalink / raw) To: linux-arm-kernel On Fri, 21 Jun 2013 14:52:17 +0200, Philipp Zabel <p.zabel@pengutronix.de> wrote: > This depends on the patch "genirq: Generic chip: Add linear irq domain support" > and removes the custom IPU irq_chip and irq_domain_ops. Instead, the generic > irq chip implementation is reused. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> > --- > drivers/staging/imx-drm/ipu-v3/ipu-common.c | 90 +++++++++-------------------- > 1 file changed, 26 insertions(+), 64 deletions(-) > > diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c > index d629d6d..c135c66 100644 > --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c > +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c > @@ -986,53 +986,6 @@ static void ipu_err_irq_handler(unsigned int irq, struct irq_desc *desc) > chained_irq_exit(chip, desc); > } > > -static void ipu_ack_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - > - ipu_cm_write(ipu, 1 << (irq % 32), IPU_INT_STAT(irq / 32)); > -} > - > -static void ipu_unmask_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - unsigned long flags; > - u32 reg; > - > - spin_lock_irqsave(&ipu->lock, flags); > - > - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); > - reg |= 1 << (irq % 32); > - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); > - > - spin_unlock_irqrestore(&ipu->lock, flags); > -} > - > -static void ipu_mask_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - unsigned long flags; > - u32 reg; > - > - spin_lock_irqsave(&ipu->lock, flags); > - > - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); > - reg &= ~(1 << (irq % 32)); > - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); > - > - spin_unlock_irqrestore(&ipu->lock, flags); > -} > - > -static struct irq_chip ipu_irq_chip = { > - .name = "IPU", > - .irq_ack = ipu_ack_irq, > - .irq_mask = ipu_mask_irq, > - .irq_unmask = ipu_unmask_irq, > -}; > - > int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel, > enum ipu_channel_irq irq_type) > { > @@ -1171,32 +1124,39 @@ err_register: > return ret; > } > > -static int ipu_irq_map(struct irq_domain *h, unsigned int irq, > - irq_hw_number_t hw) > -{ > - struct ipu_soc *ipu = h->host_data; > - > - irq_set_chip_and_handler(irq, &ipu_irq_chip, handle_level_irq); > - set_irq_flags(irq, IRQF_VALID); > - irq_set_chip_data(irq, ipu); > - > - return 0; > -} > - > -const struct irq_domain_ops ipu_irq_domain_ops = { > - .map = ipu_irq_map, > - .xlate = irq_domain_xlate_onecell, > -}; > > static int ipu_irq_init(struct ipu_soc *ipu) > { > + struct irq_chip_generic *gc; > + struct irq_chip_type *ct; > + int ret, i; > + > ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, > - &ipu_irq_domain_ops, ipu); > + &irq_generic_chip_ops, ipu); > if (!ipu->domain) { > dev_err(ipu->dev, "failed to add irq domain\n"); > return -ENODEV; > } > > + ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU", > + handle_level_irq, 0, IRQF_VALID, 0); > + if (ret < 0) { > + dev_err(ipu->dev, "failed to alloc generic irq chips\n"); > + irq_domain_remove(ipu->domain); > + return ret; > + } > + > + for (i = 0; i < IPU_NUM_IRQS; i += 32) { > + gc = irq_get_domain_generic_chip(ipu->domain, i); > + gc->reg_base = ipu->cm_reg; > + ct = gc->chip_types; > + ct->chip.irq_ack = irq_gc_ack_set_bit; > + ct->chip.irq_mask = irq_gc_mask_clr_bit; > + ct->chip.irq_unmask = irq_gc_mask_set_bit; > + ct->regs.ack = IPU_INT_STAT(i / 32); > + ct->regs.mask = IPU_INT_CTRL(i / 32); > + } > + > irq_set_chained_handler(ipu->irq_sync, ipu_irq_handler); > irq_set_handler_data(ipu->irq_sync, ipu); > irq_set_chained_handler(ipu->irq_err, ipu_err_irq_handler); > @@ -1214,6 +1174,8 @@ static void ipu_irq_exit(struct ipu_soc *ipu) > irq_set_chained_handler(ipu->irq_sync, NULL); > irq_set_handler_data(ipu->irq_sync, NULL); > > + /* TODO: remove irq_domain_generic_chips */ > + > for (i = 0; i < IPU_NUM_IRQS; i++) { > irq = irq_linear_revmap(ipu->domain, i); > if (irq) > -- > 1.8.3.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- email sent from notmuch.vim plugin ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] staging: drm/imx: use generic irqchip @ 2013-06-24 12:59 ` Grant Likely 0 siblings, 0 replies; 8+ messages in thread From: Grant Likely @ 2013-06-24 12:59 UTC (permalink / raw) To: linux-arm-kernel Cc: kernel, Greg Kroah-Hartman, dri-devel, Philipp Zabel, Shawn Guo, Fabio Estevam On Fri, 21 Jun 2013 14:52:17 +0200, Philipp Zabel <p.zabel@pengutronix.de> wrote: > This depends on the patch "genirq: Generic chip: Add linear irq domain support" > and removes the custom IPU irq_chip and irq_domain_ops. Instead, the generic > irq chip implementation is reused. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> > --- > drivers/staging/imx-drm/ipu-v3/ipu-common.c | 90 +++++++++-------------------- > 1 file changed, 26 insertions(+), 64 deletions(-) > > diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c > index d629d6d..c135c66 100644 > --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c > +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c > @@ -986,53 +986,6 @@ static void ipu_err_irq_handler(unsigned int irq, struct irq_desc *desc) > chained_irq_exit(chip, desc); > } > > -static void ipu_ack_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - > - ipu_cm_write(ipu, 1 << (irq % 32), IPU_INT_STAT(irq / 32)); > -} > - > -static void ipu_unmask_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - unsigned long flags; > - u32 reg; > - > - spin_lock_irqsave(&ipu->lock, flags); > - > - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); > - reg |= 1 << (irq % 32); > - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); > - > - spin_unlock_irqrestore(&ipu->lock, flags); > -} > - > -static void ipu_mask_irq(struct irq_data *d) > -{ > - struct ipu_soc *ipu = irq_data_get_irq_chip_data(d); > - irq_hw_number_t irq = d->hwirq; > - unsigned long flags; > - u32 reg; > - > - spin_lock_irqsave(&ipu->lock, flags); > - > - reg = ipu_cm_read(ipu, IPU_INT_CTRL(irq / 32)); > - reg &= ~(1 << (irq % 32)); > - ipu_cm_write(ipu, reg, IPU_INT_CTRL(irq / 32)); > - > - spin_unlock_irqrestore(&ipu->lock, flags); > -} > - > -static struct irq_chip ipu_irq_chip = { > - .name = "IPU", > - .irq_ack = ipu_ack_irq, > - .irq_mask = ipu_mask_irq, > - .irq_unmask = ipu_unmask_irq, > -}; > - > int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel, > enum ipu_channel_irq irq_type) > { > @@ -1171,32 +1124,39 @@ err_register: > return ret; > } > > -static int ipu_irq_map(struct irq_domain *h, unsigned int irq, > - irq_hw_number_t hw) > -{ > - struct ipu_soc *ipu = h->host_data; > - > - irq_set_chip_and_handler(irq, &ipu_irq_chip, handle_level_irq); > - set_irq_flags(irq, IRQF_VALID); > - irq_set_chip_data(irq, ipu); > - > - return 0; > -} > - > -const struct irq_domain_ops ipu_irq_domain_ops = { > - .map = ipu_irq_map, > - .xlate = irq_domain_xlate_onecell, > -}; > > static int ipu_irq_init(struct ipu_soc *ipu) > { > + struct irq_chip_generic *gc; > + struct irq_chip_type *ct; > + int ret, i; > + > ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, > - &ipu_irq_domain_ops, ipu); > + &irq_generic_chip_ops, ipu); > if (!ipu->domain) { > dev_err(ipu->dev, "failed to add irq domain\n"); > return -ENODEV; > } > > + ret = irq_alloc_domain_generic_chips(ipu->domain, 32, 1, "IPU", > + handle_level_irq, 0, IRQF_VALID, 0); > + if (ret < 0) { > + dev_err(ipu->dev, "failed to alloc generic irq chips\n"); > + irq_domain_remove(ipu->domain); > + return ret; > + } > + > + for (i = 0; i < IPU_NUM_IRQS; i += 32) { > + gc = irq_get_domain_generic_chip(ipu->domain, i); > + gc->reg_base = ipu->cm_reg; > + ct = gc->chip_types; > + ct->chip.irq_ack = irq_gc_ack_set_bit; > + ct->chip.irq_mask = irq_gc_mask_clr_bit; > + ct->chip.irq_unmask = irq_gc_mask_set_bit; > + ct->regs.ack = IPU_INT_STAT(i / 32); > + ct->regs.mask = IPU_INT_CTRL(i / 32); > + } > + > irq_set_chained_handler(ipu->irq_sync, ipu_irq_handler); > irq_set_handler_data(ipu->irq_sync, ipu); > irq_set_chained_handler(ipu->irq_err, ipu_err_irq_handler); > @@ -1214,6 +1174,8 @@ static void ipu_irq_exit(struct ipu_soc *ipu) > irq_set_chained_handler(ipu->irq_sync, NULL); > irq_set_handler_data(ipu->irq_sync, NULL); > > + /* TODO: remove irq_domain_generic_chips */ > + > for (i = 0; i < IPU_NUM_IRQS; i++) { > irq = irq_linear_revmap(ipu->domain, i); > if (irq) > -- > 1.8.3.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- email sent from notmuch.vim plugin ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] staging: drm/imx: use generic irq chip unused field to block out invalid irqs 2013-06-21 12:52 ` Philipp Zabel @ 2013-06-21 12:52 ` Philipp Zabel -1 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel This depends on the patch "genirq: irqchip: Add mask to block out invalid irqs" and masks out reserved bits using the unused interrupt bitfield. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index c135c66..b470cda 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -1129,6 +1129,16 @@ static int ipu_irq_init(struct ipu_soc *ipu) { struct irq_chip_generic *gc; struct irq_chip_type *ct; + unsigned long unused[IPU_NUM_IRQS / 32] = { + 0x400100d0, 0xffe000fd, + 0x400100d0, 0xffe000fd, + 0x400100d0, 0xffe000fd, + 0x4077ffff, 0xffe7e1fd, + 0x23fffffe, 0x8880fff0, + 0xf98fe7d0, 0xfff81fff, + 0x400100d0, 0xffe000fd, + 0x00000000, + }; int ret, i; ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, @@ -1149,6 +1159,7 @@ static int ipu_irq_init(struct ipu_soc *ipu) for (i = 0; i < IPU_NUM_IRQS; i += 32) { gc = irq_get_domain_generic_chip(ipu->domain, i); gc->reg_base = ipu->cm_reg; + gc->unused = unused[i / 32]; ct = gc->chip_types; ct->chip.irq_ack = irq_gc_ack_set_bit; ct->chip.irq_mask = irq_gc_mask_clr_bit; -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] staging: drm/imx: use generic irq chip unused field to block out invalid irqs @ 2013-06-21 12:52 ` Philipp Zabel 0 siblings, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2013-06-21 12:52 UTC (permalink / raw) To: linux-arm-kernel; +Cc: kernel, Greg Kroah-Hartman, dri-devel, Fabio Estevam This depends on the patch "genirq: irqchip: Add mask to block out invalid irqs" and masks out reserved bits using the unused interrupt bitfield. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- drivers/staging/imx-drm/ipu-v3/ipu-common.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index c135c66..b470cda 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -1129,6 +1129,16 @@ static int ipu_irq_init(struct ipu_soc *ipu) { struct irq_chip_generic *gc; struct irq_chip_type *ct; + unsigned long unused[IPU_NUM_IRQS / 32] = { + 0x400100d0, 0xffe000fd, + 0x400100d0, 0xffe000fd, + 0x400100d0, 0xffe000fd, + 0x4077ffff, 0xffe7e1fd, + 0x23fffffe, 0x8880fff0, + 0xf98fe7d0, 0xfff81fff, + 0x400100d0, 0xffe000fd, + 0x00000000, + }; int ret, i; ipu->domain = irq_domain_add_linear(ipu->dev->of_node, IPU_NUM_IRQS, @@ -1149,6 +1159,7 @@ static int ipu_irq_init(struct ipu_soc *ipu) for (i = 0; i < IPU_NUM_IRQS; i += 32) { gc = irq_get_domain_generic_chip(ipu->domain, i); gc->reg_base = ipu->cm_reg; + gc->unused = unused[i / 32]; ct = gc->chip_types; ct->chip.irq_ack = irq_gc_ack_set_bit; ct->chip.irq_mask = irq_gc_mask_clr_bit; -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2013-06-24 12:59 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-06-21 12:52 [PATCH 0/2] IPU generic irq chip Philipp Zabel 2013-06-21 12:52 ` Philipp Zabel 2013-06-21 12:52 ` [PATCH 1/2] staging: drm/imx: use generic irqchip Philipp Zabel 2013-06-21 12:52 ` Philipp Zabel 2013-06-24 12:59 ` Grant Likely 2013-06-24 12:59 ` Grant Likely 2013-06-21 12:52 ` [PATCH 2/2] staging: drm/imx: use generic irq chip unused field to block out invalid irqs Philipp Zabel 2013-06-21 12:52 ` Philipp Zabel
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