* [PATCH] drm/i915: Initialize drm_crtc gamma ramp
@ 2013-06-26 21:44 Chris Wilson
2013-06-26 22:04 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2013-06-26 21:44 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, stable
As we initialize our own gamma LUT to sane values during initialisation,
we should also update the user visible gamma ramp to match our settings.
And before touching the storage for the user visible gamma ramp, we also
need to check for an allocation failure.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5988bda..041e07a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8983,11 +8983,18 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
- drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
+ if (!drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256)) {
+ drm_crtc_cleanup(&intel_crtc->base);
+ kfree(intel_crtc);
+ return;
+ }
for (i = 0; i < 256; i++) {
intel_crtc->lut_r[i] = i;
intel_crtc->lut_g[i] = i;
intel_crtc->lut_b[i] = i;
+ intel_crtc->base.gamma_store[i + 0*256] = i << 8;
+ intel_crtc->base.gamma_store[i + 1*256] = i << 8;
+ intel_crtc->base.gamma_store[i + 2*256] = i << 8;
}
/* Swap pipes & planes for FBC on pre-965 */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] drm/i915: Initialize drm_crtc gamma ramp
2013-06-26 21:44 [PATCH] drm/i915: Initialize drm_crtc gamma ramp Chris Wilson
@ 2013-06-26 22:04 ` Chris Wilson
2013-06-28 8:35 ` [Intel-gfx] " Ville Syrjälä
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2013-06-26 22:04 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, stable
As we initialize our own gamma LUT to sane values during initialisation,
we should also update the user visible gamma ramp to match our settings.
And before touching the storage for the user visible gamma ramp, we also
need to check for an allocation failure.
v2: set_gamma_size() returns an error code, not success/fail. Also
expand the 8bit LUT value to 16bit using bit replication.
v3: Just log the error and disable gamma user functionality if we fail
to allocate the ramp during initialisation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5988bda..22bdf16 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8983,11 +8983,18 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
- drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
+ if (drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256))
+ DRM_ERROR("failed to allocate ramp for gamma, changing gamma tables will be unavailable on CRTC:%d (pipe %d)\n", intel_crtc->base.base.id, pipe);
+
for (i = 0; i < 256; i++) {
intel_crtc->lut_r[i] = i;
intel_crtc->lut_g[i] = i;
intel_crtc->lut_b[i] = i;
+ if (intel_crtc->base.gamma_size) {
+ intel_crtc->base.gamma_store[i + 0*256] = i << 8 | i;
+ intel_crtc->base.gamma_store[i + 1*256] = i << 8 | i;
+ intel_crtc->base.gamma_store[i + 2*256] = i << 8 | i;
+ }
}
/* Swap pipes & planes for FBC on pre-965 */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Initialize drm_crtc gamma ramp
2013-06-26 22:04 ` Chris Wilson
@ 2013-06-28 8:35 ` Ville Syrjälä
2013-06-28 17:41 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Ville Syrjälä @ 2013-06-28 8:35 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, stable
On Wed, Jun 26, 2013 at 11:04:55PM +0100, Chris Wilson wrote:
> As we initialize our own gamma LUT to sane values during initialisation,
> we should also update the user visible gamma ramp to match our settings.
> And before touching the storage for the user visible gamma ramp, we also
> need to check for an allocation failure.
>
> v2: set_gamma_size() returns an error code, not success/fail. Also
> expand the 8bit LUT value to 16bit using bit replication.
>
> v3: Just log the error and disable gamma user functionality if we fail
> to allocate the ramp during initialisation.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: stable@vger.kernel.org
> ---
> drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5988bda..22bdf16 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8983,11 +8983,18 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
>
> drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
>
> - drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
> + if (drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256))
> + DRM_ERROR("failed to allocate ramp for gamma, changing gamma tables will be unavailable on CRTC:%d (pipe %d)\n", intel_crtc->base.base.id, pipe);
I'd prefer to use pipe_name() consistently for such things. Should avoid
more bursts of OCD in the future :)
For the rest of the patch:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> +
> for (i = 0; i < 256; i++) {
> intel_crtc->lut_r[i] = i;
> intel_crtc->lut_g[i] = i;
> intel_crtc->lut_b[i] = i;
> + if (intel_crtc->base.gamma_size) {
> + intel_crtc->base.gamma_store[i + 0*256] = i << 8 | i;
> + intel_crtc->base.gamma_store[i + 1*256] = i << 8 | i;
> + intel_crtc->base.gamma_store[i + 2*256] = i << 8 | i;
> + }
> }
>
> /* Swap pipes & planes for FBC on pre-965 */
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH] drm/i915: Initialize drm_crtc gamma ramp
2013-06-28 8:35 ` [Intel-gfx] " Ville Syrjälä
@ 2013-06-28 17:41 ` Chris Wilson
0 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2013-06-28 17:41 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, stable
As we initialize our own gamma LUT to sane values during initialisation,
we should also update the user visible gamma ramp to match our settings.
And before touching the storage for the user visible gamma ramp, we also
need to check for an allocation failure.
v2: set_gamma_size() returns an error code, not success/fail. Also
expand the 8bit LUT value to 16bit using bit replication.
v3: Just log the error and disable gamma user functionality if we fail
to allocate the ramp during initialisation.
v4: Use pipe_name() and split the log message over multiple lines (vsyrjala)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 51730ce..6c9345e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8970,11 +8970,21 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
- drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
+ if (drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256))
+ DRM_ERROR("failed to allocate ramp for gamma"
+ " (will now be fixed at 1.0), on CRTC:%d (pipe %c)\n",
+ intel_crtc->base.base.id,
+ pipe_name(pipe));
+
for (i = 0; i < 256; i++) {
intel_crtc->lut_r[i] = i;
intel_crtc->lut_g[i] = i;
intel_crtc->lut_b[i] = i;
+ if (intel_crtc->base.gamma_size) {
+ intel_crtc->base.gamma_store[i + 0*256] = i << 8 | i;
+ intel_crtc->base.gamma_store[i + 1*256] = i << 8 | i;
+ intel_crtc->base.gamma_store[i + 2*256] = i << 8 | i;
+ }
}
/* Swap pipes & planes for FBC on pre-965 */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2013-06-28 17:41 UTC | newest]
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2013-06-26 21:44 [PATCH] drm/i915: Initialize drm_crtc gamma ramp Chris Wilson
2013-06-26 22:04 ` Chris Wilson
2013-06-28 8:35 ` [Intel-gfx] " Ville Syrjälä
2013-06-28 17:41 ` Chris Wilson
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