* [PATCH] mfd: sec: Add register cache for interrupt mask registers
@ 2013-07-02 17:51 Mark Brown
2013-07-11 11:19 ` Lee Jones
0 siblings, 1 reply; 2+ messages in thread
From: Mark Brown @ 2013-07-02 17:51 UTC (permalink / raw)
To: Samuel Ortiz, Lee Jones
Cc: linux-kernel, linux-samsung-soc, linaro-kernel, Mark Brown
From: Mark Brown <broonie@linaro.org>
The performance of regmap-irq is improved if the interrupt mask registers
can be cached since it does read/modify/update cycles so start using the
register cache infrastructure for those registers. We should use this more
widely but I don't have a datasheet and this is a nice, conservative
starting point.
Signed-off-by: Mark Brown <broonie@linaro.org>
---
drivers/mfd/sec-core.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 7976768..bbfc6c7 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -103,6 +103,31 @@ int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask)
}
EXPORT_SYMBOL_GPL(sec_reg_update);
+static bool s2mps11_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case S2MPS11_REG_INT1M:
+ case S2MPS11_REG_INT2M:
+ case S2MPS11_REG_INT3M:
+ return false;
+ default:
+ return true;
+ }
+}
+
+static bool s5m8763_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case S5M8763_REG_IRQM1:
+ case S5M8763_REG_IRQM2:
+ case S5M8763_REG_IRQM3:
+ case S5M8763_REG_IRQM4:
+ return false;
+ default:
+ return true;
+ }
+}
+
static struct regmap_config sec_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -113,6 +138,8 @@ static struct regmap_config s2mps11_regmap_config = {
.val_bits = 8,
.max_register = S2MPS11_REG_L38CTRL,
+ .volatile_reg = s2mps11_volatile,
+ .cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8763_regmap_config = {
@@ -120,6 +147,8 @@ static struct regmap_config s5m8763_regmap_config = {
.val_bits = 8,
.max_register = S5M8763_REG_LBCNFG2,
+ .volatile_reg = s5m8763_volatile,
+ .cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8767_regmap_config = {
@@ -127,6 +156,8 @@ static struct regmap_config s5m8767_regmap_config = {
.val_bits = 8,
.max_register = S5M8767_REG_LDO28CTRL,
+ .volatile_reg = s2mps11_volatile,
+ .cache_type = REGCACHE_FLAT,
};
#ifdef CONFIG_OF
--
1.8.3.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] mfd: sec: Add register cache for interrupt mask registers
2013-07-02 17:51 [PATCH] mfd: sec: Add register cache for interrupt mask registers Mark Brown
@ 2013-07-11 11:19 ` Lee Jones
0 siblings, 0 replies; 2+ messages in thread
From: Lee Jones @ 2013-07-11 11:19 UTC (permalink / raw)
To: Mark Brown
Cc: Samuel Ortiz, linux-kernel, linux-samsung-soc, linaro-kernel,
Mark Brown
On Tue, 02 Jul 2013, Mark Brown wrote:
> From: Mark Brown <broonie@linaro.org>
>
> The performance of regmap-irq is improved if the interrupt mask registers
> can be cached since it does read/modify/update cycles so start using the
> register cache infrastructure for those registers. We should use this more
> widely but I don't have a datasheet and this is a nice, conservative
> starting point.
>
> Signed-off-by: Mark Brown <broonie@linaro.org>
> ---
> drivers/mfd/sec-core.c | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
Applied, thanks.
--
Lee Jones
Linaro ST-Ericsson Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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2013-07-11 11:19 ` Lee Jones
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