* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-06-24 18:42 ` Sylwester Nawrocki 0 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-06-24 18:42 UTC (permalink / raw) To: mturquette Cc: linux-kernel, kyungmin.park, linux-arm-kernel, linux-samsung-soc, Sylwester Nawrocki The ISP clock registers belong to the ISP power domain and may change their values if this power domain is switched off/on. Add CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached data when setting or getting frequency of those clocks. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> --- drivers/clk/samsung/clk-exynos4.c | 64 ++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 30 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 94c5e1a..a5d72f5 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -578,11 +578,15 @@ struct samsung_div_clock exynos4x12_div_clks[] __initdata = { DIV(none, "div_spi1_isp", "mout_spi1_isp", E4X12_DIV_ISP, 16, 4), DIV(none, "div_spi1_isp_pre", "div_spi1_isp", E4X12_DIV_ISP, 20, 8), DIV(none, "div_uart_isp", "mout_uart_isp", E4X12_DIV_ISP, 28, 4), - DIV(div_isp0, "div_isp0", "aclk200", E4X12_DIV_ISP0, 0, 3), - DIV(div_isp1, "div_isp1", "aclk200", E4X12_DIV_ISP0, 4, 3), + DIV_F(div_isp0, "div_isp0", "aclk200", E4X12_DIV_ISP0, 0, 3, + CLK_GET_RATE_NOCACHE, 0), + DIV_F(div_isp1, "div_isp1", "aclk200", E4X12_DIV_ISP0, 4, 3, + CLK_GET_RATE_NOCACHE, 0), DIV(none, "div_mpwm", "div_isp1", E4X12_DIV_ISP1, 0, 3), - DIV(div_mcuisp0, "div_mcuisp0", "aclk400_mcuisp", E4X12_DIV_ISP1, 4, 3), - DIV(div_mcuisp1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, 8, 3), + DIV_F(div_mcuisp0, "div_mcuisp0", "aclk400_mcuisp", E4X12_DIV_ISP1, + 4, 3, CLK_GET_RATE_NOCACHE, 0), + DIV_F(div_mcuisp1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, + 8, 3, CLK_GET_RATE_NOCACHE, 0), }; /* list of gate clocks supported in all exynos4 soc's */ @@ -857,57 +861,57 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE_DA(i2s0, "samsung-i2s.0", "i2s0", "aclk100", E4X12_GATE_IP_MAUDIO, 3, 0, 0, "iis"), GATE(fimc_isp, "isp", "aclk200", E4X12_GATE_ISP0, 0, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_drc, "drc", "aclk200", E4X12_GATE_ISP0, 1, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_fd, "fd", "aclk200", E4X12_GATE_ISP0, 2, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_lite0, "lite0", "aclk200", E4X12_GATE_ISP0, 3, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_lite1, "lite1", "aclk200", E4X12_GATE_ISP0, 4, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mcuisp, "mcuisp", "aclk200", E4X12_GATE_ISP0, 5, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(gicisp, "gicisp", "aclk200", E4X12_GATE_ISP0, 7, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_isp, "smmu_isp", "aclk200", E4X12_GATE_ISP0, 8, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_drc, "smmu_drc", "aclk200", E4X12_GATE_ISP0, 9, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_fd, "smmu_fd", "aclk200", E4X12_GATE_ISP0, 10, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_lite0, "smmu_lite0", "aclk200", E4X12_GATE_ISP0, 11, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_lite1, "smmu_lite1", "aclk200", E4X12_GATE_ISP0, 12, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(ppmuispmx, "ppmuispmx", "aclk200", E4X12_GATE_ISP0, 20, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(ppmuispx, "ppmuispx", "aclk200", E4X12_GATE_ISP0, 21, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mcuctl_isp, "mcuctl_isp", "aclk200", E4X12_GATE_ISP0, 23, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mpwm_isp, "mpwm_isp", "aclk200", E4X12_GATE_ISP0, 24, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(i2c0_isp, "i2c0_isp", "aclk200", E4X12_GATE_ISP0, 25, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(i2c1_isp, "i2c1_isp", "aclk200", E4X12_GATE_ISP0, 26, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mtcadc_isp, "mtcadc_isp", "aclk200", E4X12_GATE_ISP0, 27, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(pwm_isp, "pwm_isp", "aclk200", E4X12_GATE_ISP0, 28, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(wdt_isp, "wdt_isp", "aclk200", E4X12_GATE_ISP0, 30, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(uart_isp, "uart_isp", "aclk200", E4X12_GATE_ISP0, 31, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(asyncaxim, "asyncaxim", "aclk200", E4X12_GATE_ISP1, 0, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_ispcx, "smmu_ispcx", "aclk200", E4X12_GATE_ISP1, 4, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(spi0_isp, "spi0_isp", "aclk200", E4X12_GATE_ISP1, 12, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), }; /* -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-06-24 18:42 ` Sylwester Nawrocki 0 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-06-24 18:42 UTC (permalink / raw) To: linux-arm-kernel The ISP clock registers belong to the ISP power domain and may change their values if this power domain is switched off/on. Add CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached data when setting or getting frequency of those clocks. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> --- drivers/clk/samsung/clk-exynos4.c | 64 ++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 30 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 94c5e1a..a5d72f5 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -578,11 +578,15 @@ struct samsung_div_clock exynos4x12_div_clks[] __initdata = { DIV(none, "div_spi1_isp", "mout_spi1_isp", E4X12_DIV_ISP, 16, 4), DIV(none, "div_spi1_isp_pre", "div_spi1_isp", E4X12_DIV_ISP, 20, 8), DIV(none, "div_uart_isp", "mout_uart_isp", E4X12_DIV_ISP, 28, 4), - DIV(div_isp0, "div_isp0", "aclk200", E4X12_DIV_ISP0, 0, 3), - DIV(div_isp1, "div_isp1", "aclk200", E4X12_DIV_ISP0, 4, 3), + DIV_F(div_isp0, "div_isp0", "aclk200", E4X12_DIV_ISP0, 0, 3, + CLK_GET_RATE_NOCACHE, 0), + DIV_F(div_isp1, "div_isp1", "aclk200", E4X12_DIV_ISP0, 4, 3, + CLK_GET_RATE_NOCACHE, 0), DIV(none, "div_mpwm", "div_isp1", E4X12_DIV_ISP1, 0, 3), - DIV(div_mcuisp0, "div_mcuisp0", "aclk400_mcuisp", E4X12_DIV_ISP1, 4, 3), - DIV(div_mcuisp1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, 8, 3), + DIV_F(div_mcuisp0, "div_mcuisp0", "aclk400_mcuisp", E4X12_DIV_ISP1, + 4, 3, CLK_GET_RATE_NOCACHE, 0), + DIV_F(div_mcuisp1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, + 8, 3, CLK_GET_RATE_NOCACHE, 0), }; /* list of gate clocks supported in all exynos4 soc's */ @@ -857,57 +861,57 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE_DA(i2s0, "samsung-i2s.0", "i2s0", "aclk100", E4X12_GATE_IP_MAUDIO, 3, 0, 0, "iis"), GATE(fimc_isp, "isp", "aclk200", E4X12_GATE_ISP0, 0, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_drc, "drc", "aclk200", E4X12_GATE_ISP0, 1, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_fd, "fd", "aclk200", E4X12_GATE_ISP0, 2, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_lite0, "lite0", "aclk200", E4X12_GATE_ISP0, 3, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(fimc_lite1, "lite1", "aclk200", E4X12_GATE_ISP0, 4, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mcuisp, "mcuisp", "aclk200", E4X12_GATE_ISP0, 5, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(gicisp, "gicisp", "aclk200", E4X12_GATE_ISP0, 7, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_isp, "smmu_isp", "aclk200", E4X12_GATE_ISP0, 8, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_drc, "smmu_drc", "aclk200", E4X12_GATE_ISP0, 9, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_fd, "smmu_fd", "aclk200", E4X12_GATE_ISP0, 10, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_lite0, "smmu_lite0", "aclk200", E4X12_GATE_ISP0, 11, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_lite1, "smmu_lite1", "aclk200", E4X12_GATE_ISP0, 12, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(ppmuispmx, "ppmuispmx", "aclk200", E4X12_GATE_ISP0, 20, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(ppmuispx, "ppmuispx", "aclk200", E4X12_GATE_ISP0, 21, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mcuctl_isp, "mcuctl_isp", "aclk200", E4X12_GATE_ISP0, 23, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mpwm_isp, "mpwm_isp", "aclk200", E4X12_GATE_ISP0, 24, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(i2c0_isp, "i2c0_isp", "aclk200", E4X12_GATE_ISP0, 25, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(i2c1_isp, "i2c1_isp", "aclk200", E4X12_GATE_ISP0, 26, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(mtcadc_isp, "mtcadc_isp", "aclk200", E4X12_GATE_ISP0, 27, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(pwm_isp, "pwm_isp", "aclk200", E4X12_GATE_ISP0, 28, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(wdt_isp, "wdt_isp", "aclk200", E4X12_GATE_ISP0, 30, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(uart_isp, "uart_isp", "aclk200", E4X12_GATE_ISP0, 31, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(asyncaxim, "asyncaxim", "aclk200", E4X12_GATE_ISP1, 0, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(smmu_ispcx, "smmu_ispcx", "aclk200", E4X12_GATE_ISP1, 4, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(spi0_isp, "spi0_isp", "aclk200", E4X12_GATE_ISP1, 12, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(spi1_isp, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, - CLK_IGNORE_UNUSED, 0), + CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), }; /* -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks 2013-06-24 18:42 ` Sylwester Nawrocki @ 2013-07-22 12:14 ` Sylwester Nawrocki -1 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-07-22 12:14 UTC (permalink / raw) To: mturquette Cc: linux-kernel, kyungmin.park, linux-arm-kernel, linux-samsung-soc On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > The ISP clock registers belong to the ISP power domain and may change > their values if this power domain is switched off/on. Add > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > data when setting or getting frequency of those clocks. > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Mike, would you consider queueing that patch for current -rc cycle ? Thanks, Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-07-22 12:14 ` Sylwester Nawrocki 0 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-07-22 12:14 UTC (permalink / raw) To: linux-arm-kernel On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > The ISP clock registers belong to the ISP power domain and may change > their values if this power domain is switched off/on. Add > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > data when setting or getting frequency of those clocks. > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Mike, would you consider queueing that patch for current -rc cycle ? Thanks, Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks 2013-07-22 12:14 ` Sylwester Nawrocki @ 2013-07-22 22:02 ` Mike Turquette -1 siblings, 0 replies; 10+ messages in thread From: Mike Turquette @ 2013-07-22 22:02 UTC (permalink / raw) To: Sylwester Nawrocki Cc: kyungmin.park, linux-samsung-soc, linux-kernel, linux-arm-kernel Quoting Sylwester Nawrocki (2013-07-22 05:14:40) > On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > > The ISP clock registers belong to the ISP power domain and may change > > their values if this power domain is switched off/on. Add > > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > > data when setting or getting frequency of those clocks. > > > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > Mike, > > would you consider queueing that patch for current -rc cycle ? Taken into clk-fixes. Will probably get it out before -rc3, but if not definitely -rc4. Regards, Mike > > Thanks, > Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-07-22 22:02 ` Mike Turquette 0 siblings, 0 replies; 10+ messages in thread From: Mike Turquette @ 2013-07-22 22:02 UTC (permalink / raw) To: linux-arm-kernel Quoting Sylwester Nawrocki (2013-07-22 05:14:40) > On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > > The ISP clock registers belong to the ISP power domain and may change > > their values if this power domain is switched off/on. Add > > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > > data when setting or getting frequency of those clocks. > > > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > Mike, > > would you consider queueing that patch for current -rc cycle ? Taken into clk-fixes. Will probably get it out before -rc3, but if not definitely -rc4. Regards, Mike > > Thanks, > Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks 2013-07-22 12:14 ` Sylwester Nawrocki @ 2013-07-25 20:23 ` Mike Turquette -1 siblings, 0 replies; 10+ messages in thread From: Mike Turquette @ 2013-07-25 20:23 UTC (permalink / raw) To: Sylwester Nawrocki Cc: kyungmin.park, linux-samsung-soc, linux-kernel, linux-arm-kernel Quoting Sylwester Nawrocki (2013-07-22 05:14:40) > On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > > The ISP clock registers belong to the ISP power domain and may change > > their values if this power domain is switched off/on. Add > > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > > data when setting or getting frequency of those clocks. > > > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > Mike, > > would you consider queueing that patch for current -rc cycle ? Sylwester, Can you rebase this onto -rc2? It does not apply cleanly onto my -fixes branch. Regards, Mike > > Thanks, > Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-07-25 20:23 ` Mike Turquette 0 siblings, 0 replies; 10+ messages in thread From: Mike Turquette @ 2013-07-25 20:23 UTC (permalink / raw) To: linux-arm-kernel Quoting Sylwester Nawrocki (2013-07-22 05:14:40) > On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: > > The ISP clock registers belong to the ISP power domain and may change > > their values if this power domain is switched off/on. Add > > CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached > > data when setting or getting frequency of those clocks. > > > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > Mike, > > would you consider queueing that patch for current -rc cycle ? Sylwester, Can you rebase this onto -rc2? It does not apply cleanly onto my -fixes branch. Regards, Mike > > Thanks, > Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks 2013-07-25 20:23 ` Mike Turquette @ 2013-07-25 21:13 ` Sylwester Nawrocki -1 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-07-25 21:13 UTC (permalink / raw) To: Mike Turquette Cc: Sylwester Nawrocki, kyungmin.park, linux-samsung-soc, linux-kernel, linux-arm-kernel On 07/25/2013 10:23 PM, Mike Turquette wrote: > Quoting Sylwester Nawrocki (2013-07-22 05:14:40) >> On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: >>> The ISP clock registers belong to the ISP power domain and may change >>> their values if this power domain is switched off/on. Add >>> CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached >>> data when setting or getting frequency of those clocks. >>> >>> Signed-off-by: Sylwester Nawrocki<s.nawrocki@samsung.com> >>> Signed-off-by: Kyungmin Park<kyungmin.park@samsung.com> >> >> Mike, >> >> would you consider queueing that patch for current -rc cycle ? > > Sylwester, > > Can you rebase this onto -rc2? It does not apply cleanly onto my -fixes > branch. Sure, I've just posted an updated version. Thanks, Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks @ 2013-07-25 21:13 ` Sylwester Nawrocki 0 siblings, 0 replies; 10+ messages in thread From: Sylwester Nawrocki @ 2013-07-25 21:13 UTC (permalink / raw) To: linux-arm-kernel On 07/25/2013 10:23 PM, Mike Turquette wrote: > Quoting Sylwester Nawrocki (2013-07-22 05:14:40) >> On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote: >>> The ISP clock registers belong to the ISP power domain and may change >>> their values if this power domain is switched off/on. Add >>> CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached >>> data when setting or getting frequency of those clocks. >>> >>> Signed-off-by: Sylwester Nawrocki<s.nawrocki@samsung.com> >>> Signed-off-by: Kyungmin Park<kyungmin.park@samsung.com> >> >> Mike, >> >> would you consider queueing that patch for current -rc cycle ? > > Sylwester, > > Can you rebase this onto -rc2? It does not apply cleanly onto my -fixes > branch. Sure, I've just posted an updated version. Thanks, Sylwester ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2013-07-25 21:13 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-06-24 18:42 [PATCH] clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocks Sylwester Nawrocki 2013-06-24 18:42 ` Sylwester Nawrocki 2013-07-22 12:14 ` Sylwester Nawrocki 2013-07-22 12:14 ` Sylwester Nawrocki 2013-07-22 22:02 ` Mike Turquette 2013-07-22 22:02 ` Mike Turquette 2013-07-25 20:23 ` Mike Turquette 2013-07-25 20:23 ` Mike Turquette 2013-07-25 21:13 ` Sylwester Nawrocki 2013-07-25 21:13 ` Sylwester Nawrocki
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