* [PATCH 0/2] clk: sunxi: Add clock support for the A10s @ 2013-07-23 22:28 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: linux-arm-kernel Hi, This small patchset adds support for the gates found in the Allwinner A10s SoC. Since the gates are the only clock that differ from the other supported Allwinner SoCs so far, the two patches are quite trivial. Thanks, Maxime Maxime Ripard (2): clk: sunxi: Add A10s gates ARM: sun5i: dt: Use the A10s gates in the DTSI arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- drivers/clk/sunxi/clk-sunxi.c | 15 +++++++++++++++ 2 files changed, 29 insertions(+), 22 deletions(-) -- 1.8.3.2 ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 0/2] clk: sunxi: Add clock support for the A10s @ 2013-07-23 22:28 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: Mike Turquette Cc: Emilio Lopez, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard Hi, This small patchset adds support for the gates found in the Allwinner A10s SoC. Since the gates are the only clock that differ from the other supported Allwinner SoCs so far, the two patches are quite trivial. Thanks, Maxime Maxime Ripard (2): clk: sunxi: Add A10s gates ARM: sun5i: dt: Use the A10s gates in the DTSI arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- drivers/clk/sunxi/clk-sunxi.c | 15 +++++++++++++++ 2 files changed, 29 insertions(+), 22 deletions(-) -- 1.8.3.2 ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/2] clk: sunxi: Add A10s gates 2013-07-23 22:28 ` Maxime Ripard @ 2013-07-23 22:28 ` Maxime Ripard -1 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: linux-arm-kernel The Allwinner A10s has a slightly different gates set than the A10 and A13, so add these gates to the clk driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- drivers/clk/sunxi/clk-sunxi.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 412912b..db1c45b 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -341,6 +341,10 @@ static const __initconst struct gates_data sun4i_ahb_gates_data = { .mask = {0x7F77FFF, 0x14FB3F}, }; +static const __initconst struct gates_data sun5i_a10s_ahb_gates_data = { + .mask = {0x147667e7, 0x185915}, +}; + static const __initconst struct gates_data sun5i_a13_ahb_gates_data = { .mask = {0x107067e7, 0x185111}, }; @@ -349,6 +353,10 @@ static const __initconst struct gates_data sun4i_apb0_gates_data = { .mask = {0x4EF}, }; +static const __initconst struct gates_data sun5i_a10s_apb0_gates_data = { + .mask = {0x469}, +}; + static const __initconst struct gates_data sun5i_a13_apb0_gates_data = { .mask = {0x61}, }; @@ -357,6 +365,10 @@ static const __initconst struct gates_data sun4i_apb1_gates_data = { .mask = {0xFF00F7}, }; +static const __initconst struct gates_data sun5i_a10s_apb1_gates_data = { + .mask = {0xf0007}, +}; + static const __initconst struct gates_data sun5i_a13_apb1_gates_data = { .mask = {0xa0007}, }; @@ -442,10 +454,13 @@ static const __initconst struct of_device_id clk_mux_match[] = { static const __initconst struct of_device_id clk_gates_match[] = { {.compatible = "allwinner,sun4i-axi-gates-clk", .data = &sun4i_axi_gates_data,}, {.compatible = "allwinner,sun4i-ahb-gates-clk", .data = &sun4i_ahb_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-ahb-gates-clk", .data = &sun5i_a10s_ahb_gates_data,}, {.compatible = "allwinner,sun5i-a13-ahb-gates-clk", .data = &sun5i_a13_ahb_gates_data,}, {.compatible = "allwinner,sun4i-apb0-gates-clk", .data = &sun4i_apb0_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-apb0-gates-clk", .data = &sun5i_a10s_apb0_gates_data,}, {.compatible = "allwinner,sun5i-a13-apb0-gates-clk", .data = &sun5i_a13_apb0_gates_data,}, {.compatible = "allwinner,sun4i-apb1-gates-clk", .data = &sun4i_apb1_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-apb1-gates-clk", .data = &sun5i_a10s_apb1_gates_data,}, {.compatible = "allwinner,sun5i-a13-apb1-gates-clk", .data = &sun5i_a13_apb1_gates_data,}, {} }; -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 1/2] clk: sunxi: Add A10s gates @ 2013-07-23 22:28 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: Mike Turquette Cc: Emilio Lopez, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard The Allwinner A10s has a slightly different gates set than the A10 and A13, so add these gates to the clk driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- drivers/clk/sunxi/clk-sunxi.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 412912b..db1c45b 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -341,6 +341,10 @@ static const __initconst struct gates_data sun4i_ahb_gates_data = { .mask = {0x7F77FFF, 0x14FB3F}, }; +static const __initconst struct gates_data sun5i_a10s_ahb_gates_data = { + .mask = {0x147667e7, 0x185915}, +}; + static const __initconst struct gates_data sun5i_a13_ahb_gates_data = { .mask = {0x107067e7, 0x185111}, }; @@ -349,6 +353,10 @@ static const __initconst struct gates_data sun4i_apb0_gates_data = { .mask = {0x4EF}, }; +static const __initconst struct gates_data sun5i_a10s_apb0_gates_data = { + .mask = {0x469}, +}; + static const __initconst struct gates_data sun5i_a13_apb0_gates_data = { .mask = {0x61}, }; @@ -357,6 +365,10 @@ static const __initconst struct gates_data sun4i_apb1_gates_data = { .mask = {0xFF00F7}, }; +static const __initconst struct gates_data sun5i_a10s_apb1_gates_data = { + .mask = {0xf0007}, +}; + static const __initconst struct gates_data sun5i_a13_apb1_gates_data = { .mask = {0xa0007}, }; @@ -442,10 +454,13 @@ static const __initconst struct of_device_id clk_mux_match[] = { static const __initconst struct of_device_id clk_gates_match[] = { {.compatible = "allwinner,sun4i-axi-gates-clk", .data = &sun4i_axi_gates_data,}, {.compatible = "allwinner,sun4i-ahb-gates-clk", .data = &sun4i_ahb_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-ahb-gates-clk", .data = &sun5i_a10s_ahb_gates_data,}, {.compatible = "allwinner,sun5i-a13-ahb-gates-clk", .data = &sun5i_a13_ahb_gates_data,}, {.compatible = "allwinner,sun4i-apb0-gates-clk", .data = &sun4i_apb0_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-apb0-gates-clk", .data = &sun5i_a10s_apb0_gates_data,}, {.compatible = "allwinner,sun5i-a13-apb0-gates-clk", .data = &sun5i_a13_apb0_gates_data,}, {.compatible = "allwinner,sun4i-apb1-gates-clk", .data = &sun4i_apb1_gates_data,}, + {.compatible = "allwinner,sun5i-a10s-apb1-gates-clk", .data = &sun5i_a10s_apb1_gates_data,}, {.compatible = "allwinner,sun5i-a13-apb1-gates-clk", .data = &sun5i_a13_apb1_gates_data,}, {} }; -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 1/2] clk: sunxi: Add A10s gates 2013-07-23 22:28 ` Maxime Ripard @ 2013-08-02 14:25 ` Emilio López -1 siblings, 0 replies; 16+ messages in thread From: Emilio López @ 2013-08-02 14:25 UTC (permalink / raw) To: linux-arm-kernel Hi Maxime, El 23/07/13 19:28, Maxime Ripard escribi?: > The Allwinner A10s has a slightly different gates set than the A10 and > A13, so add these gates to the clk driver. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Looks good to me, and my A10S board still boots, so Tested-by: Emilio L?pez <emilio@elopez.com.ar> Reviewed-by: Emilio L?pez <emilio@elopez.com.ar> Thanks! Emilio ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/2] clk: sunxi: Add A10s gates @ 2013-08-02 14:25 ` Emilio López 0 siblings, 0 replies; 16+ messages in thread From: Emilio López @ 2013-08-02 14:25 UTC (permalink / raw) To: Maxime Ripard Cc: Mike Turquette, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel Hi Maxime, El 23/07/13 19:28, Maxime Ripard escribió: > The Allwinner A10s has a slightly different gates set than the A10 and > A13, so add these gates to the clk driver. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Looks good to me, and my A10S board still boots, so Tested-by: Emilio López <emilio@elopez.com.ar> Reviewed-by: Emilio López <emilio@elopez.com.ar> Thanks! Emilio ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 1/2] clk: sunxi: Add A10s gates 2013-08-02 14:25 ` Emilio López @ 2013-08-05 20:29 ` Maxime Ripard -1 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-05 20:29 UTC (permalink / raw) To: linux-arm-kernel Hi Emilio, On Fri, Aug 02, 2013 at 11:25:02AM -0300, Emilio L?pez wrote: > Hi Maxime, > > El 23/07/13 19:28, Maxime Ripard escribi?: > > The Allwinner A10s has a slightly different gates set than the A10 and > > A13, so add these gates to the clk driver. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > Looks good to me, and my A10S board still boots, so > > Tested-by: Emilio L?pez <emilio@elopez.com.ar> > Reviewed-by: Emilio L?pez <emilio@elopez.com.ar> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130805/d6b5720b/attachment.sig> ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 1/2] clk: sunxi: Add A10s gates @ 2013-08-05 20:29 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-05 20:29 UTC (permalink / raw) To: Emilio López Cc: Mike Turquette, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel [-- Attachment #1: Type: text/plain, Size: 637 bytes --] Hi Emilio, On Fri, Aug 02, 2013 at 11:25:02AM -0300, Emilio López wrote: > Hi Maxime, > > El 23/07/13 19:28, Maxime Ripard escribió: > > The Allwinner A10s has a slightly different gates set than the A10 and > > A13, so add these gates to the clk driver. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > Looks good to me, and my A10S board still boots, so > > Tested-by: Emilio López <emilio@elopez.com.ar> > Reviewed-by: Emilio López <emilio@elopez.com.ar> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI 2013-07-23 22:28 ` Maxime Ripard @ 2013-07-23 22:28 ` Maxime Ripard -1 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: linux-arm-kernel The A10s has only a subset of the A10 gates. Now that the clock driver has support for this gates set, switch to it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- 1 file changed, 14 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 0f0881a..b8fc1c2 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -95,20 +95,16 @@ ahb_gates: ahb_gates at 01c20060 { #clock-cells = <1>; - compatible = "allwinner,sun4i-ahb-gates-clk"; + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; - clock-output-names = "ahb_usb0", "ahb_ehci0", - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", + "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; }; apb0: apb0 at 01c20054 { @@ -120,12 +116,11 @@ apb0_gates: apb0_gates at 01c20068 { #clock-cells = <1>; - compatible = "allwinner,sun4i-apb0-gates-clk"; + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; - clock-output-names = "apb0_codec", "apb0_spdif", - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", - "apb0_ir1", "apb0_keypad"; + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", + "apb0_ir", "apb0_keypad"; }; /* dummy is pll62 */ @@ -145,15 +140,12 @@ apb1_gates: apb1_gates at 01c2006c { #clock-cells = <1>; - compatible = "allwinner,sun4i-apb1-gates-clk"; + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb1>; clock-output-names = "apb1_i2c0", "apb1_i2c1", - "apb1_i2c2", "apb1_can", "apb1_scr", - "apb1_ps20", "apb1_ps21", "apb1_uart0", - "apb1_uart1", "apb1_uart2", "apb1_uart3", - "apb1_uart4", "apb1_uart5", "apb1_uart6", - "apb1_uart7"; + "apb1_i2c2", "apb1_uart0", "apb1_uart1", + "apb1_uart2", "apb1_uart3"; }; }; -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI @ 2013-07-23 22:28 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-07-23 22:28 UTC (permalink / raw) To: Mike Turquette Cc: Emilio Lopez, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel, linux-sunxi, Maxime Ripard The A10s has only a subset of the A10 gates. Now that the clock driver has support for this gates set, switch to it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- 1 file changed, 14 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 0f0881a..b8fc1c2 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -95,20 +95,16 @@ ahb_gates: ahb_gates@01c20060 { #clock-cells = <1>; - compatible = "allwinner,sun4i-ahb-gates-clk"; + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; - clock-output-names = "ahb_usb0", "ahb_ehci0", - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", + "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; }; apb0: apb0@01c20054 { @@ -120,12 +116,11 @@ apb0_gates: apb0_gates@01c20068 { #clock-cells = <1>; - compatible = "allwinner,sun4i-apb0-gates-clk"; + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; - clock-output-names = "apb0_codec", "apb0_spdif", - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", - "apb0_ir1", "apb0_keypad"; + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", + "apb0_ir", "apb0_keypad"; }; /* dummy is pll62 */ @@ -145,15 +140,12 @@ apb1_gates: apb1_gates@01c2006c { #clock-cells = <1>; - compatible = "allwinner,sun4i-apb1-gates-clk"; + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb1>; clock-output-names = "apb1_i2c0", "apb1_i2c1", - "apb1_i2c2", "apb1_can", "apb1_scr", - "apb1_ps20", "apb1_ps21", "apb1_uart0", - "apb1_uart1", "apb1_uart2", "apb1_uart3", - "apb1_uart4", "apb1_uart5", "apb1_uart6", - "apb1_uart7"; + "apb1_i2c2", "apb1_uart0", "apb1_uart1", + "apb1_uart2", "apb1_uart3"; }; }; -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI 2013-07-23 22:28 ` Maxime Ripard @ 2013-08-02 14:40 ` Emilio López -1 siblings, 0 replies; 16+ messages in thread From: Emilio López @ 2013-08-02 14:40 UTC (permalink / raw) To: linux-arm-kernel Hi Maxime, El 23/07/13 19:28, Maxime Ripard escribi?: > The A10s has only a subset of the A10 gates. Now that the clock driver > has support for this gates set, switch to it in the DTSI. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> As I mentioned on the other patch, my board boots, so Tested-by: Emilio L?pez <emilio@elopez.com.ar> > --- > arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- > 1 file changed, 14 insertions(+), 22 deletions(-) > > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi > index 0f0881a..b8fc1c2 100644 > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > @@ -95,20 +95,16 @@ > > ahb_gates: ahb_gates at 01c20060 { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-ahb-gates-clk"; > + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; > reg = <0x01c20060 0x8>; > clocks = <&ahb>; > - clock-output-names = "ahb_usb0", "ahb_ehci0", > - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", > - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", > - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", > - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", > - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", > - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", > - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", > - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", > - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", > - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; > + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", > + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", > + "ahb_mmc1", "ahb_mmc2", I noticed the vendor code also has "ahb_ms" here, it might be worth keeping it in mind. > "ahb_nand", "ahb_sdram", > + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", > + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", > + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", > + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; > }; > > apb0: apb0 at 01c20054 { > @@ -120,12 +116,11 @@ > > apb0_gates: apb0_gates at 01c20068 { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-apb0-gates-clk"; > + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; > reg = <0x01c20068 0x4>; > clocks = <&apb0>; > - clock-output-names = "apb0_codec", "apb0_spdif", > - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", > - "apb0_ir1", "apb0_keypad"; > + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", > + "apb0_ir", "apb0_keypad"; > }; > > /* dummy is pll62 */ > @@ -145,15 +140,12 @@ > > apb1_gates: apb1_gates at 01c2006c { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-apb1-gates-clk"; > + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; > reg = <0x01c2006c 0x4>; > clocks = <&apb1>; > clock-output-names = "apb1_i2c0", "apb1_i2c1", > - "apb1_i2c2", "apb1_can", "apb1_scr", > - "apb1_ps20", "apb1_ps21", "apb1_uart0", > - "apb1_uart1", "apb1_uart2", "apb1_uart3", > - "apb1_uart4", "apb1_uart5", "apb1_uart6", > - "apb1_uart7"; > + "apb1_i2c2", "apb1_uart0", "apb1_uart1", > + "apb1_uart2", "apb1_uart3"; > }; > }; > > An update to the documentation mentioning these compatibles[1] and gates[2] would be great :) [1] Documentation/devicetree/bindings/clock/sunxi.txt [2] Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt Thanks for working on this! Emilio ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI @ 2013-08-02 14:40 ` Emilio López 0 siblings, 0 replies; 16+ messages in thread From: Emilio López @ 2013-08-02 14:40 UTC (permalink / raw) To: Maxime Ripard Cc: Mike Turquette, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel Hi Maxime, El 23/07/13 19:28, Maxime Ripard escribió: > The A10s has only a subset of the A10 gates. Now that the clock driver > has support for this gates set, switch to it in the DTSI. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> As I mentioned on the other patch, my board boots, so Tested-by: Emilio López <emilio@elopez.com.ar> > --- > arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- > 1 file changed, 14 insertions(+), 22 deletions(-) > > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi > index 0f0881a..b8fc1c2 100644 > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > @@ -95,20 +95,16 @@ > > ahb_gates: ahb_gates@01c20060 { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-ahb-gates-clk"; > + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; > reg = <0x01c20060 0x8>; > clocks = <&ahb>; > - clock-output-names = "ahb_usb0", "ahb_ehci0", > - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", > - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", > - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", > - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", > - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", > - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", > - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", > - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", > - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", > - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; > + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", > + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", > + "ahb_mmc1", "ahb_mmc2", I noticed the vendor code also has "ahb_ms" here, it might be worth keeping it in mind. > "ahb_nand", "ahb_sdram", > + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", > + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", > + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", > + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; > }; > > apb0: apb0@01c20054 { > @@ -120,12 +116,11 @@ > > apb0_gates: apb0_gates@01c20068 { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-apb0-gates-clk"; > + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; > reg = <0x01c20068 0x4>; > clocks = <&apb0>; > - clock-output-names = "apb0_codec", "apb0_spdif", > - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", > - "apb0_ir1", "apb0_keypad"; > + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", > + "apb0_ir", "apb0_keypad"; > }; > > /* dummy is pll62 */ > @@ -145,15 +140,12 @@ > > apb1_gates: apb1_gates@01c2006c { > #clock-cells = <1>; > - compatible = "allwinner,sun4i-apb1-gates-clk"; > + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; > reg = <0x01c2006c 0x4>; > clocks = <&apb1>; > clock-output-names = "apb1_i2c0", "apb1_i2c1", > - "apb1_i2c2", "apb1_can", "apb1_scr", > - "apb1_ps20", "apb1_ps21", "apb1_uart0", > - "apb1_uart1", "apb1_uart2", "apb1_uart3", > - "apb1_uart4", "apb1_uart5", "apb1_uart6", > - "apb1_uart7"; > + "apb1_i2c2", "apb1_uart0", "apb1_uart1", > + "apb1_uart2", "apb1_uart3"; > }; > }; > > An update to the documentation mentioning these compatibles[1] and gates[2] would be great :) [1] Documentation/devicetree/bindings/clock/sunxi.txt [2] Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt Thanks for working on this! Emilio ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI 2013-08-02 14:40 ` Emilio López @ 2013-08-05 20:33 ` Maxime Ripard -1 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-05 20:33 UTC (permalink / raw) To: linux-arm-kernel Hi Emilio, On Fri, Aug 02, 2013 at 11:40:14AM -0300, Emilio L?pez wrote: > El 23/07/13 19:28, Maxime Ripard escribi?: > > The A10s has only a subset of the A10 gates. Now that the clock driver > > has support for this gates set, switch to it in the DTSI. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > As I mentioned on the other patch, my board boots, so > > Tested-by: Emilio L?pez <emilio@elopez.com.ar> Thanks. > > --- > > arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- > > 1 file changed, 14 insertions(+), 22 deletions(-) > > > > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi > > index 0f0881a..b8fc1c2 100644 > > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > > @@ -95,20 +95,16 @@ > > > > ahb_gates: ahb_gates at 01c20060 { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-ahb-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; > > reg = <0x01c20060 0x8>; > > clocks = <&ahb>; > > - clock-output-names = "ahb_usb0", "ahb_ehci0", > > - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", > > - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", > > - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", > > - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", > > - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", > > - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", > > - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", > > - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", > > - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", > > - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; > > + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", > > + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", > > + "ahb_mmc1", "ahb_mmc2", > > I noticed the vendor code also has "ahb_ms" here, it might be worth > keeping it in mind. What is this clock used for? I couldn't find an IP in the user manual that could fit this MS abbreviation. > > > "ahb_nand", "ahb_sdram", > > + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", > > + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", > > + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", > > + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; > > }; > > > > apb0: apb0 at 01c20054 { > > @@ -120,12 +116,11 @@ > > > > apb0_gates: apb0_gates at 01c20068 { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-apb0-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; > > reg = <0x01c20068 0x4>; > > clocks = <&apb0>; > > - clock-output-names = "apb0_codec", "apb0_spdif", > > - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", > > - "apb0_ir1", "apb0_keypad"; > > + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", > > + "apb0_ir", "apb0_keypad"; > > }; > > > > /* dummy is pll62 */ > > @@ -145,15 +140,12 @@ > > > > apb1_gates: apb1_gates at 01c2006c { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-apb1-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; > > reg = <0x01c2006c 0x4>; > > clocks = <&apb1>; > > clock-output-names = "apb1_i2c0", "apb1_i2c1", > > - "apb1_i2c2", "apb1_can", "apb1_scr", > > - "apb1_ps20", "apb1_ps21", "apb1_uart0", > > - "apb1_uart1", "apb1_uart2", "apb1_uart3", > > - "apb1_uart4", "apb1_uart5", "apb1_uart6", > > - "apb1_uart7"; > > + "apb1_i2c2", "apb1_uart0", "apb1_uart1", > > + "apb1_uart2", "apb1_uart3"; > > }; > > }; > > > > > > An update to the documentation mentioning these compatibles[1] and > gates[2] would be great :) > > [1] Documentation/devicetree/bindings/clock/sunxi.txt > [2] Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt Ah, right. I'll send a v2 with the documentation. And I'll do the same for the A31 clock patches that also lacked this part. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130805/5c0cc4e4/attachment.sig> ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI @ 2013-08-05 20:33 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-05 20:33 UTC (permalink / raw) To: Emilio López Cc: Mike Turquette, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel [-- Attachment #1: Type: text/plain, Size: 4177 bytes --] Hi Emilio, On Fri, Aug 02, 2013 at 11:40:14AM -0300, Emilio López wrote: > El 23/07/13 19:28, Maxime Ripard escribió: > > The A10s has only a subset of the A10 gates. Now that the clock driver > > has support for this gates set, switch to it in the DTSI. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > As I mentioned on the other patch, my board boots, so > > Tested-by: Emilio López <emilio@elopez.com.ar> Thanks. > > --- > > arch/arm/boot/dts/sun5i-a10s.dtsi | 36 ++++++++++++++---------------------- > > 1 file changed, 14 insertions(+), 22 deletions(-) > > > > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi > > index 0f0881a..b8fc1c2 100644 > > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > > @@ -95,20 +95,16 @@ > > > > ahb_gates: ahb_gates@01c20060 { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-ahb-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-ahb-gates-clk"; > > reg = <0x01c20060 0x8>; > > clocks = <&ahb>; > > - clock-output-names = "ahb_usb0", "ahb_ehci0", > > - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", > > - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", > > - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", > > - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", > > - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", > > - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", > > - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", > > - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", > > - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", > > - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; > > + clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", > > + "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", > > + "ahb_mmc1", "ahb_mmc2", > > I noticed the vendor code also has "ahb_ms" here, it might be worth > keeping it in mind. What is this clock used for? I couldn't find an IP in the user manual that could fit this MS abbreviation. > > > "ahb_nand", "ahb_sdram", > > + "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", > > + "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve", > > + "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi", > > + "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400"; > > }; > > > > apb0: apb0@01c20054 { > > @@ -120,12 +116,11 @@ > > > > apb0_gates: apb0_gates@01c20068 { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-apb0-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-apb0-gates-clk"; > > reg = <0x01c20068 0x4>; > > clocks = <&apb0>; > > - clock-output-names = "apb0_codec", "apb0_spdif", > > - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", > > - "apb0_ir1", "apb0_keypad"; > > + clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio", > > + "apb0_ir", "apb0_keypad"; > > }; > > > > /* dummy is pll62 */ > > @@ -145,15 +140,12 @@ > > > > apb1_gates: apb1_gates@01c2006c { > > #clock-cells = <1>; > > - compatible = "allwinner,sun4i-apb1-gates-clk"; > > + compatible = "allwinner,sun5i-a10s-apb1-gates-clk"; > > reg = <0x01c2006c 0x4>; > > clocks = <&apb1>; > > clock-output-names = "apb1_i2c0", "apb1_i2c1", > > - "apb1_i2c2", "apb1_can", "apb1_scr", > > - "apb1_ps20", "apb1_ps21", "apb1_uart0", > > - "apb1_uart1", "apb1_uart2", "apb1_uart3", > > - "apb1_uart4", "apb1_uart5", "apb1_uart6", > > - "apb1_uart7"; > > + "apb1_i2c2", "apb1_uart0", "apb1_uart1", > > + "apb1_uart2", "apb1_uart3"; > > }; > > }; > > > > > > An update to the documentation mentioning these compatibles[1] and > gates[2] would be great :) > > [1] Documentation/devicetree/bindings/clock/sunxi.txt > [2] Documentation/devicetree/bindings/clock/sunxi/sun5i-a10s-gates.txt Ah, right. I'll send a v2 with the documentation. And I'll do the same for the A31 clock patches that also lacked this part. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 0/2] clk: sunxi: Add clock support for the A10s 2013-07-23 22:28 ` Maxime Ripard @ 2013-08-02 10:07 ` Maxime Ripard -1 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-02 10:07 UTC (permalink / raw) To: linux-arm-kernel Hi Mike, Emilio, On Wed, Jul 24, 2013 at 12:28:22AM +0200, Maxime Ripard wrote: > Hi, > > This small patchset adds support for the gates found in the Allwinner A10s SoC. > Since the gates are the only clock that differ from the other supported > Allwinner SoCs so far, the two patches are quite trivial. Could you take a look at this? Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20130802/2bcca85a/attachment.sig> ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH 0/2] clk: sunxi: Add clock support for the A10s @ 2013-08-02 10:07 ` Maxime Ripard 0 siblings, 0 replies; 16+ messages in thread From: Maxime Ripard @ 2013-08-02 10:07 UTC (permalink / raw) To: Mike Turquette Cc: Emilio Lopez, kevin.z.m.zh, sunny, shuge, linux-arm-kernel, linux-kernel, linux-sunxi [-- Attachment #1: Type: text/plain, Size: 480 bytes --] Hi Mike, Emilio, On Wed, Jul 24, 2013 at 12:28:22AM +0200, Maxime Ripard wrote: > Hi, > > This small patchset adds support for the gates found in the Allwinner A10s SoC. > Since the gates are the only clock that differ from the other supported > Allwinner SoCs so far, the two patches are quite trivial. Could you take a look at this? Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com [-- Attachment #2: Digital signature --] [-- Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2013-08-05 20:41 UTC | newest] Thread overview: 16+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-07-23 22:28 [PATCH 0/2] clk: sunxi: Add clock support for the A10s Maxime Ripard 2013-07-23 22:28 ` Maxime Ripard 2013-07-23 22:28 ` [PATCH 1/2] clk: sunxi: Add A10s gates Maxime Ripard 2013-07-23 22:28 ` Maxime Ripard 2013-08-02 14:25 ` Emilio López 2013-08-02 14:25 ` Emilio López 2013-08-05 20:29 ` Maxime Ripard 2013-08-05 20:29 ` Maxime Ripard 2013-07-23 22:28 ` [PATCH 2/2] ARM: sun5i: dt: Use the A10s gates in the DTSI Maxime Ripard 2013-07-23 22:28 ` Maxime Ripard 2013-08-02 14:40 ` Emilio López 2013-08-02 14:40 ` Emilio López 2013-08-05 20:33 ` Maxime Ripard 2013-08-05 20:33 ` Maxime Ripard 2013-08-02 10:07 ` [PATCH 0/2] clk: sunxi: Add clock support for the A10s Maxime Ripard 2013-08-02 10:07 ` Maxime Ripard
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