* [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING
@ 2013-09-11 15:22 Stephane Eranian
2013-09-11 16:50 ` Andi Kleen
2013-09-12 11:11 ` [tip:perf/urgent] perf/x86: Add constraint for IVB CYCLE_ACTIVITY :CYCLES_LDM_PENDING tip-bot for Stephane Eranian
0 siblings, 2 replies; 4+ messages in thread
From: Stephane Eranian @ 2013-09-11 15:22 UTC (permalink / raw)
To: linux-kernel; +Cc: peterz, mingo, ak, zheng.z.yan, dhsharp
The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
be measured on counters 0-3 when HT is off. When HT is on, you
only have counters 0-3.
If you program it on the eight counters for 1s on a 3GHz
IVB laptop running a noploop, you see:
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
Clearly the last 4 values are bogus.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
arch/x86/kernel/cpu/perf_event_intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0abf674..c62d883 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -124,6 +124,7 @@ static struct event_constraint intel_ivb_event_constraints[] __read_mostly =
INTEL_UEVENT_CONSTRAINT(0x0148, 0x4), /* L1D_PEND_MISS.PENDING */
INTEL_UEVENT_CONSTRAINT(0x0279, 0xf), /* IDQ.EMTPY */
INTEL_UEVENT_CONSTRAINT(0x019c, 0xf), /* IDQ_UOPS_NOT_DELIVERED.CORE */
+ INTEL_UEVENT_CONSTRAINT(0x02a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_LDM_PENDING */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */
INTEL_UEVENT_CONSTRAINT(0x06a3, 0xf), /* CYCLE_ACTIVITY.STALLS_LDM_PENDING */
--
1.8.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2013-09-11 15:22 [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING Stephane Eranian
@ 2013-09-11 16:50 ` Andi Kleen
2013-09-11 16:55 ` Stephane Eranian
2013-09-12 11:11 ` [tip:perf/urgent] perf/x86: Add constraint for IVB CYCLE_ACTIVITY :CYCLES_LDM_PENDING tip-bot for Stephane Eranian
1 sibling, 1 reply; 4+ messages in thread
From: Andi Kleen @ 2013-09-11 16:50 UTC (permalink / raw)
To: Stephane Eranian; +Cc: linux-kernel, peterz, mingo, zheng.z.yan, dhsharp
On Wed, Sep 11, 2013 at 08:22:22AM -0700, Stephane Eranian wrote:
>
> The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
> be measured on counters 0-3 when HT is off. When HT is on, you
> only have counters 0-3.
>
> If you program it on the eight counters for 1s on a 3GHz
> IVB laptop running a noploop, you see:
>
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>
> Clearly the last 4 values are bogus.
Thanks looks good.
Likely need it on Haswell too?
-Andi
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2013-09-11 16:50 ` Andi Kleen
@ 2013-09-11 16:55 ` Stephane Eranian
0 siblings, 0 replies; 4+ messages in thread
From: Stephane Eranian @ 2013-09-11 16:55 UTC (permalink / raw)
To: Andi Kleen; +Cc: LKML, Peter Zijlstra, mingo@elte.hu, Yan, Zheng, David Sharp
On Wed, Sep 11, 2013 at 6:50 PM, Andi Kleen <ak@linux.intel.com> wrote:
> On Wed, Sep 11, 2013 at 08:22:22AM -0700, Stephane Eranian wrote:
>>
>> The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
>> be measured on counters 0-3 when HT is off. When HT is on, you
>> only have counters 0-3.
>>
>> If you program it on the eight counters for 1s on a 3GHz
>> IVB laptop running a noploop, you see:
>>
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>> 3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
>>
>> Clearly the last 4 values are bogus.
>
> Thanks looks good.
>
> Likely need it on Haswell too?
>
Will check on that one later this week.
But I think you are right.
> -Andi
^ permalink raw reply [flat|nested] 4+ messages in thread
* [tip:perf/urgent] perf/x86: Add constraint for IVB CYCLE_ACTIVITY :CYCLES_LDM_PENDING
2013-09-11 15:22 [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING Stephane Eranian
2013-09-11 16:50 ` Andi Kleen
@ 2013-09-12 11:11 ` tip-bot for Stephane Eranian
1 sibling, 0 replies; 4+ messages in thread
From: tip-bot for Stephane Eranian @ 2013-09-12 11:11 UTC (permalink / raw)
To: linux-tip-commits; +Cc: linux-kernel, eranian, hpa, mingo, tglx
Commit-ID: 6113af14c82726d5a2993a7ba238df24c990a5ee
Gitweb: http://git.kernel.org/tip/6113af14c82726d5a2993a7ba238df24c990a5ee
Author: Stephane Eranian <eranian@google.com>
AuthorDate: Wed, 11 Sep 2013 08:22:22 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Thu, 12 Sep 2013 07:58:26 +0200
perf/x86: Add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING
The IvyBridge event CYCLE_ACTIVITY:CYCLES_LDM_PENDING can only
be measured on counters 0-3 when HT is off. When HT is on, you
only have counters 0-3.
If you program it on the eight counters for 1s on a 3GHz
IVB laptop running a noploop, you see:
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
2 747 527 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
3 280 563 608 CYCLE_ACTIVITY:CYCLES_LDM_PENDING
Clearly the last 4 values are bogus.
Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: ak@linux.intel.com
Cc: zheng.z.yan@intel.com
Cc: dhsharp@google.com
Link: http://lkml.kernel.org/r/20130911152222.GA28761@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0abf674..c62d883 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -124,6 +124,7 @@ static struct event_constraint intel_ivb_event_constraints[] __read_mostly =
INTEL_UEVENT_CONSTRAINT(0x0148, 0x4), /* L1D_PEND_MISS.PENDING */
INTEL_UEVENT_CONSTRAINT(0x0279, 0xf), /* IDQ.EMTPY */
INTEL_UEVENT_CONSTRAINT(0x019c, 0xf), /* IDQ_UOPS_NOT_DELIVERED.CORE */
+ INTEL_UEVENT_CONSTRAINT(0x02a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_LDM_PENDING */
INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */
INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */
INTEL_UEVENT_CONSTRAINT(0x06a3, 0xf), /* CYCLE_ACTIVITY.STALLS_LDM_PENDING */
^ permalink raw reply related [flat|nested] 4+ messages in thread
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2013-09-11 15:22 [PATCH] perf,x86: add constraint for IVB CYCLE_ACTIVITY:CYCLES_LDM_PENDING Stephane Eranian
2013-09-11 16:50 ` Andi Kleen
2013-09-11 16:55 ` Stephane Eranian
2013-09-12 11:11 ` [tip:perf/urgent] perf/x86: Add constraint for IVB CYCLE_ACTIVITY :CYCLES_LDM_PENDING tip-bot for Stephane Eranian
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