Re: commit 5fe212364 causes division by zero with large bauds

[Felipe Balbi <balbi@ti.com>]

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Hi,

On Wed, Sep 11, 2013 at 09:22:26AM +0300, Alexey Pelykh wrote:
> Hi Felipe,
> 
> Thanks for finding this issue. Indeed, there is a bug on 3M+ baud
> rates. First patch is close to a complete fix, but still contains
> div-by-zero issue. Here is my version:
> 
> diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
> index 816d1a2..808a880 100644
> --- a/drivers/tty/serial/omap-serial.c
> +++ b/drivers/tty/serial/omap-serial.c
> @@ -240,8 +240,8 @@ serial_omap_baud_is_mode16(struct uart_port *port,
> unsigned int baud)
>  {
>         unsigned int n13 = port->uartclk / (13 * baud);
>         unsigned int n16 = port->uartclk / (16 * baud);
> -       int baudAbsDiff13 = baud - (port->uartclk / (13 * n13));
> -       int baudAbsDiff16 = baud - (port->uartclk / (16 * n16));
> +       int baudAbsDiff13 = n13 ? (baud - (port->uartclk / (13 * n13))) : INT_MAX;
> +       int baudAbsDiff16 = n16 ? (baud - (port->uartclk / (16 * n16))) : INT_MAX;

IOW:

int baudAbsDiff13 = 0;

if (n13)
	baudAbsDiff13 = (baud - (port->uartclk / (13 * n13)));

which is exactly what my patch did. I fail to see where division by zero
would be coming from.

>         if(baudAbsDiff13 < 0)
>                 baudAbsDiff13 = -baudAbsDiff13;
>         if(baudAbsDiff16 < 0)
> 
> 
> With 48MHz UART clock, it will give
> 300: divisor = 12307 (13), real rate 300 (0.000000%)
> 600: divisor = 6153 (13), real rate 600 (0.000000%)
> 1200: divisor = 3076 (13), real rate 1200 (0.000000%)
> 2400: divisor = 1538 (13), real rate 2400 (0.000000%)

TRM has these all set with oversampling of 16. In fact only 460800,
921600, 1843200 and 3686400 should be using oversampling of 13.

-- 
balbi

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