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From: Andreas Herrmann <andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
	<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
	Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH 4/7] iommu/arm-smmu: Support buggy implementations where all config accesses are secure
Date: Thu, 10 Oct 2013 17:57:06 +0200	[thread overview]
Message-ID: <20131010155706.GR2935@alberich> (raw)
In-Reply-To: <20131010154726.GB8528-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>

On Thu, Oct 10, 2013 at 11:47:27AM -0400, Will Deacon wrote:
> On Wed, Oct 09, 2013 at 11:38:03PM +0100, Andreas Herrmann wrote:
> > In such a case we have to use secure aliases of some non-secure
> > registers.
> > 
> > This handling is switched on by DT property
> > "arm,smmu-secure-config-access" for an SMMU node.
> > 
> > Signed-off-by: Andreas Herrmann <andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
> > ---
> >  drivers/iommu/arm-smmu.c |   30 +++++++++++++++++++++---------
> >  1 file changed, 21 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index f877d02..91316a8 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -51,6 +51,7 @@
> >  /* Driver options */
> >  #define ARM_SMMU_OPT_ISOLATE_DEVICES		(1 << 0)
> >  #define ARM_SMMU_OPT_MASK_STREAM_IDS		(1 << 1)
> > +#define ARM_SMMU_OPT_SECURE_CONFIG_ACCESS	(1 << 2)
> >  
> >  /* Maximum number of stream IDs assigned to a single device */
> >  #define MAX_MASTER_STREAMIDS		8
> > @@ -65,6 +66,15 @@
> >  #define ARM_SMMU_GR0(smmu)		((smmu)->base)
> >  #define ARM_SMMU_GR1(smmu)		((smmu)->base + (smmu)->pagesize)
> >  
> > +/*
> > + * SMMU global address space with conditional offset to access secure aliases of
> > + * non-secure registers (e.g. nsCR0: 0x400, nsGFSR: 0x448, nsGFSYNR0: 0x450)
> > + */
> > +#define ARM_SMMU_GR0_NS(smmu)						\
> > +	((smmu)->base +							\
> > +		((smmu->options & ARM_SMMU_OPT_SECURE_CONFIG_ACCESS)	\
> > +			? 0x400 : 0))
> 
> You have a slight issue with the ordering of your patches, as this macro is
> used by the stream masking patch, but this patch is based on top of the
> latter.
> 
> Can you introduce this patch first please? I think it's ok for merging, but
> I still have reservations with the other one.

Oops, I've done some shuffling to update the first patch in the
series. Obviously I mixed something up during this.

I'll fix this asap.


Andreas

WARNING: multiple messages have this Message-ID (diff)
From: andreas.herrmann@calxeda.com (Andreas Herrmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/7] iommu/arm-smmu: Support buggy implementations where all config accesses are secure
Date: Thu, 10 Oct 2013 17:57:06 +0200	[thread overview]
Message-ID: <20131010155706.GR2935@alberich> (raw)
In-Reply-To: <20131010154726.GB8528@mudshark.cambridge.arm.com>

On Thu, Oct 10, 2013 at 11:47:27AM -0400, Will Deacon wrote:
> On Wed, Oct 09, 2013 at 11:38:03PM +0100, Andreas Herrmann wrote:
> > In such a case we have to use secure aliases of some non-secure
> > registers.
> > 
> > This handling is switched on by DT property
> > "arm,smmu-secure-config-access" for an SMMU node.
> > 
> > Signed-off-by: Andreas Herrmann <andreas.herrmann@calxeda.com>
> > ---
> >  drivers/iommu/arm-smmu.c |   30 +++++++++++++++++++++---------
> >  1 file changed, 21 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index f877d02..91316a8 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -51,6 +51,7 @@
> >  /* Driver options */
> >  #define ARM_SMMU_OPT_ISOLATE_DEVICES		(1 << 0)
> >  #define ARM_SMMU_OPT_MASK_STREAM_IDS		(1 << 1)
> > +#define ARM_SMMU_OPT_SECURE_CONFIG_ACCESS	(1 << 2)
> >  
> >  /* Maximum number of stream IDs assigned to a single device */
> >  #define MAX_MASTER_STREAMIDS		8
> > @@ -65,6 +66,15 @@
> >  #define ARM_SMMU_GR0(smmu)		((smmu)->base)
> >  #define ARM_SMMU_GR1(smmu)		((smmu)->base + (smmu)->pagesize)
> >  
> > +/*
> > + * SMMU global address space with conditional offset to access secure aliases of
> > + * non-secure registers (e.g. nsCR0: 0x400, nsGFSR: 0x448, nsGFSYNR0: 0x450)
> > + */
> > +#define ARM_SMMU_GR0_NS(smmu)						\
> > +	((smmu)->base +							\
> > +		((smmu->options & ARM_SMMU_OPT_SECURE_CONFIG_ACCESS)	\
> > +			? 0x400 : 0))
> 
> You have a slight issue with the ordering of your patches, as this macro is
> used by the stream masking patch, but this patch is based on top of the
> latter.
> 
> Can you introduce this patch first please? I think it's ok for merging, but
> I still have reservations with the other one.

Oops, I've done some shuffling to update the first patch in the
series. Obviously I mixed something up during this.

I'll fix this asap.


Andreas

  parent reply	other threads:[~2013-10-10 15:57 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-09 22:37 [PATCH v2 0/7] iommu/arm-smmu: Misc modifications to support SMMUs on Calxeda ECX-2000 Andreas Herrmann
2013-10-09 22:37 ` Andreas Herrmann
     [not found] ` <1381358286-27065-1-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-09 22:38   ` [PATCH 1/7] iommu/arm-smmu: Introduce driver option handling Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
     [not found]     ` <1381358286-27065-2-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-10 15:44       ` Will Deacon
2013-10-10 15:44         ` Will Deacon
2013-10-09 22:38   ` [PATCH 2/7] iommu/arm-smmu: Introduce bus notifier block Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
     [not found]     ` <1381358286-27065-3-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-10 16:12       ` Will Deacon
2013-10-10 16:12         ` Will Deacon
     [not found]         ` <20131010161217.GD8528-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-10 16:47           ` Andreas Herrmann
2013-10-10 16:47             ` Andreas Herrmann
2013-10-09 22:38   ` [PATCH 3/7] iommu/arm-smmu: Introduce stream ID masking Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
2013-10-09 22:38   ` [PATCH 4/7] iommu/arm-smmu: Support buggy implementations where all config accesses are secure Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
     [not found]     ` <1381358286-27065-5-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-10 15:47       ` Will Deacon
2013-10-10 15:47         ` Will Deacon
     [not found]         ` <20131010154726.GB8528-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-10 15:57           ` Andreas Herrmann [this message]
2013-10-10 15:57             ` Andreas Herrmann
2013-10-09 22:38   ` [PATCH 5/7] ARM: dts: Add nodes for SMMUs on Calxeda ECX-2000 Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
2013-10-09 22:38   ` [PATCH 6/7] documentation/iommu: Update description of ARM System MMU binding Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
2013-10-09 22:38   ` [PATCH 7/7] iommu/arm-smmu: Introduce automatic stream-id-masking Andreas Herrmann
2013-10-09 22:38     ` Andreas Herrmann
     [not found]     ` <1381358286-27065-8-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-10 16:05       ` Will Deacon
2013-10-10 16:05         ` Will Deacon
     [not found]         ` <20131010160539.GC8528-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-10 17:01           ` Andreas Herrmann
2013-10-10 17:01             ` Andreas Herrmann

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