From: Arnd Bergmann <arnd@arndb.de>
To: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Ian Campbell <ian.campbell@citrix.com>,
Pawel Moll <pawel.moll@arm.com>,
Stephen Warren <swarren@wwwdotorg.org>,
Seungwon Jeon <tgih.jun@samsung.com>,
Pavel Machek <pavel@denx.de>,
linux-mmc@vger.kernel.org, Rob Herring <rob.herring@calxeda.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
linux-arm-kernel@lists.infradead.org,
Olof Johansson <olof@lixom.net>, Chris Ball <cjb@laptop.org>,
dinguyen@altera.com
Subject: Re: [RESEND PATCHv2 1/3] arm: socfpga: Set the SDMMC clock phase in system manager
Date: Tue, 15 Oct 2013 21:47:27 +0200 [thread overview]
Message-ID: <201310152147.27569.arnd@arndb.de> (raw)
In-Reply-To: <525D9532.6080503@gmail.com>
On Tuesday 15 October 2013, Dinh Nguyen wrote:
> >
> > 1 Create a "syscon" backend driver to control your "system manager", which
> > lets other drivers hook into it without calling a private API.
> Yes, if you look at drivers/mmc/host/dw_mmc-socfpga.c that is in the
> mainline,
> it is hooking into the "system manager" through "syscon". Is this what you
> mean here?
No, because you directly hook into the syscon driver, rather than using
a clock driver as the middle-man, see steps 2 and 3 below.
> The problem is because of the SYSMGR_SDMMCGRP_CTRL_OFFSET define
> in this file. This means the SD/MMC driver needs information that is
> outside of its IP.
Yes, this is not ideal because you don't really want that information
in the sd/mmc driver. That driver should only know about the fact
that it talks to a clock controller, not how it's implemented.
Arnd
> > 2 Create a trivial clock driver that is independent of your existing
> > clock driver and independent of the other drivers using the system
> > manager, by using syscon as the low-level interface.
> > 3 Make the sdmmc driver use the normal clock API and link its clock to the
> > driver from step 2 in the device tree.
> >
> > Is this what you have tried before?
WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCHv2 1/3] arm: socfpga: Set the SDMMC clock phase in system manager
Date: Tue, 15 Oct 2013 21:47:27 +0200 [thread overview]
Message-ID: <201310152147.27569.arnd@arndb.de> (raw)
In-Reply-To: <525D9532.6080503@gmail.com>
On Tuesday 15 October 2013, Dinh Nguyen wrote:
> >
> > 1 Create a "syscon" backend driver to control your "system manager", which
> > lets other drivers hook into it without calling a private API.
> Yes, if you look at drivers/mmc/host/dw_mmc-socfpga.c that is in the
> mainline,
> it is hooking into the "system manager" through "syscon". Is this what you
> mean here?
No, because you directly hook into the syscon driver, rather than using
a clock driver as the middle-man, see steps 2 and 3 below.
> The problem is because of the SYSMGR_SDMMCGRP_CTRL_OFFSET define
> in this file. This means the SD/MMC driver needs information that is
> outside of its IP.
Yes, this is not ideal because you don't really want that information
in the sd/mmc driver. That driver should only know about the fact
that it talks to a clock controller, not how it's implemented.
Arnd
> > 2 Create a trivial clock driver that is independent of your existing
> > clock driver and independent of the other drivers using the system
> > manager, by using syscon as the low-level interface.
> > 3 Make the sdmmc driver use the normal clock API and link its clock to the
> > driver from step 2 in the device tree.
> >
> > Is this what you have tried before?
next prev parent reply other threads:[~2013-10-15 19:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-14 19:47 [RESEND PATCHv2 1/3] arm: socfpga: Set the SDMMC clock phase in system manager dinguyen
2013-10-14 19:47 ` dinguyen at altera.com
[not found] ` <1381780051-1826-1-git-send-email-dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>
2013-10-14 19:47 ` [RESEND PATCHv2 2/3] mmc: dw_mmc-socfpga: Clean up SOCFPGA platform specific functionality dinguyen-EIB2kfCEclfQT0dZR+AlfA
2013-10-14 19:47 ` dinguyen at altera.com
2013-10-14 19:47 ` [RESEND PATCHv2 3/3] arm: dts: socfpga: Add support for SD/MMC dinguyen
2013-10-14 19:47 ` dinguyen at altera.com
2013-10-15 6:51 ` [RESEND PATCHv2 1/3] arm: socfpga: Set the SDMMC clock phase in system manager Jaehoon Chung
2013-10-15 6:51 ` Jaehoon Chung
2013-10-15 12:37 ` Dinh Nguyen
2013-10-15 12:37 ` Dinh Nguyen
2013-10-15 12:50 ` Arnd Bergmann
2013-10-15 12:50 ` Arnd Bergmann
2013-10-15 13:22 ` Dinh Nguyen
2013-10-15 13:22 ` Dinh Nguyen
2013-10-15 19:01 ` Arnd Bergmann
2013-10-15 19:01 ` Arnd Bergmann
2013-10-15 19:19 ` Dinh Nguyen
2013-10-15 19:19 ` Dinh Nguyen
2013-10-15 19:47 ` Arnd Bergmann [this message]
2013-10-15 19:47 ` Arnd Bergmann
2013-10-15 20:21 ` Dinh Nguyen
2013-10-15 20:21 ` Dinh Nguyen
2013-10-16 18:56 ` Arnd Bergmann
2013-10-16 18:56 ` Arnd Bergmann
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