Re: [PATCH 2/2] mmc: dw_mmc-pltm: Remove Rockchip's custom dw_mmc driver structure

["Heiko Stübner" <heiko@sntech.de>]

Am Samstag, 7. Dezember 2013, 00:27:01 schrieb Dinh Nguyen:
> On 12/6/13 5:22 PM, Heiko Stübner wrote:
> > Am Samstag, 7. Dezember 2013, 00:18:07 schrieb Dinh Nguyen:
> >> On 12/6/13 5:14 PM, Heiko Stübner wrote:
> >>> Am Freitag, 6. Dezember 2013, 17:10:23 schrieb dinguyen@altera.com:@@
> >>> -42,7 +42,7 @@
> >>> 
> >>>  /* Common flag combinations */
> >>>  #define DW_MCI_DATA_ERROR_FLAGS        (SDMMC_INT_DRTO |
> >>>  SDMMC_INT_DCRC | \
> >>>  
> >>>                                  SDMMC_INT_HTO | SDMMC_INT_SBE  | \
> >>> 
> >>> -                                SDMMC_INT_EBE)
> >>> +                                SDMMC_INT_EBE | SDMMC_INT_FRUN)
> >>> 
> >>>  #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \
> >>>  
> >>>> From: Dinh Nguyen <dinguyen@altera.com>
> >>>> 
> >>>> Rockchip's implementation of the dw_mmc controller only requires the
> >>>> setting of the SDMMC_CMD_USE_HOLD_REG on every command. With the patch
> >>>> to set the SDMMC_CMD_USE_HOLD_REG by checking the slot's speed mode,
> >>>> this Rockchip custom driver structure is no longer necessary.
> >>>> 
> >>>> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> >>> 
> >>> hmm, testing will need a bit more time, as it seems one of the changes
> >>> merged during the 3.13 merge window broke the dw-mmc on the rockchip.
> >> 
> >> Thanks Heiko. Don't bother with v1, I overlooked another aspect of using
> >> the hold
> >> reg. Let me send out a v2 for you to test.
> > 
> > Don't worry ... as I've said, first I need to find the current issue :-)
> 
> What behavior are you seeing?

forget that I said anything :-)

It seems I messed up when bringing my rockchip development tree forward to the 
current 3.13-rc. It's working now with and without the change you sent.

So now I can wait for your v2 and test it then.

bedtime now,


Heiko