* [PATCH 0/2] perf/x86: various RAPL improvements
@ 2013-12-16 20:20 Stephane Eranian
2013-12-16 20:20 ` [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support Stephane Eranian
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Stephane Eranian @ 2013-12-16 20:20 UTC (permalink / raw)
To: linux-kernel
Cc: peterz, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver,
maria.n.dimakopoulou
This short patch series provides the following improvements
to the RAPL support for perf_events:
- Intel Haswell Celeron (model 69) support
- support for RAPL PP1 energy counter
The PP1 counter maps to the builtin graphic card for client
processors. The new energy event is:
- name: power/energy-gfx/
- code: 0x4
- unit: Joules
- scaling factor: 2^-32 Joules.
Signed-off-by: Stephane Eranian <eranian@google.com>
Stephane Eranian (2):
perf/x86: enable Haswell Celeron RAPL support
perf/x86: add RAPL PP1 energy counter support
arch/x86/kernel/cpu/perf_event_intel_rapl.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support 2013-12-16 20:20 [PATCH 0/2] perf/x86: various RAPL improvements Stephane Eranian @ 2013-12-16 20:20 ` Stephane Eranian 2013-12-18 10:32 ` [tip:perf/core] " tip-bot for Stephane Eranian 2013-12-16 20:20 ` [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support Stephane Eranian 2013-12-17 9:02 ` [PATCH 0/2] perf/x86: various RAPL improvements Peter Zijlstra 2 siblings, 1 reply; 7+ messages in thread From: Stephane Eranian @ 2013-12-16 20:20 UTC (permalink / raw) To: linux-kernel Cc: peterz, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver, maria.n.dimakopoulou Enable RAPL support for Haswell Celeron (model 69). Signed-off-by: Stephane Eranian <eranian@google.com> --- arch/x86/kernel/cpu/perf_event_intel_rapl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index bf8e4a7..0e3754e 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c @@ -615,6 +615,7 @@ static int __init rapl_pmu_init(void) case 42: /* Sandy Bridge */ case 58: /* Ivy Bridge */ case 60: /* Haswell */ + case 69: /* Haswell-Celeron */ rapl_cntr_mask = RAPL_IDX_CLN; rapl_pmu_events_group.attrs = rapl_events_cln_attr; break; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [tip:perf/core] perf/x86: enable Haswell Celeron RAPL support 2013-12-16 20:20 ` [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support Stephane Eranian @ 2013-12-18 10:32 ` tip-bot for Stephane Eranian 0 siblings, 0 replies; 7+ messages in thread From: tip-bot for Stephane Eranian @ 2013-12-18 10:32 UTC (permalink / raw) To: linux-tip-commits; +Cc: linux-kernel, eranian, hpa, mingo, peterz, tglx Commit-ID: 7fd565e27547c913b83b46d94662103be81a88ec Gitweb: http://git.kernel.org/tip/7fd565e27547c913b83b46d94662103be81a88ec Author: Stephane Eranian <eranian@google.com> AuthorDate: Mon, 16 Dec 2013 21:20:23 +0100 Committer: Ingo Molnar <mingo@kernel.org> CommitDate: Tue, 17 Dec 2013 15:21:32 +0100 perf/x86: enable Haswell Celeron RAPL support Enable RAPL support for Haswell Celeron (model 69). Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: ak@linux.intel.com Cc: acme@redhat.com Cc: jolsa@redhat.com Cc: zheng.z.yan@intel.com Cc: bp@alien8.de Cc: vincent.weaver@maine.edu Cc: maria.n.dimakopoulou@gmail.com Cc: peterz@infradead.org Link: http://lkml.kernel.org/r/1387225224-27799-2-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org> --- arch/x86/kernel/cpu/perf_event_intel_rapl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index bf8e4a7..0e3754e 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c @@ -615,6 +615,7 @@ static int __init rapl_pmu_init(void) case 42: /* Sandy Bridge */ case 58: /* Ivy Bridge */ case 60: /* Haswell */ + case 69: /* Haswell-Celeron */ rapl_cntr_mask = RAPL_IDX_CLN; rapl_pmu_events_group.attrs = rapl_events_cln_attr; break; ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support 2013-12-16 20:20 [PATCH 0/2] perf/x86: various RAPL improvements Stephane Eranian 2013-12-16 20:20 ` [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support Stephane Eranian @ 2013-12-16 20:20 ` Stephane Eranian 2013-12-17 10:42 ` Ingo Molnar 2013-12-17 14:15 ` Ingo Molnar 2013-12-17 9:02 ` [PATCH 0/2] perf/x86: various RAPL improvements Peter Zijlstra 2 siblings, 2 replies; 7+ messages in thread From: Stephane Eranian @ 2013-12-16 20:20 UTC (permalink / raw) To: linux-kernel Cc: peterz, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver, maria.n.dimakopoulou Add support for the RAPL energy counter PP1. On client processors, it usually correspondss to the energy consumption of the builtin graphic card. New event: - name: power/energy-gfx/ - code: event=0x4 - unit: 2^-32 Joules On processors without graphics, this should count 0. The patch only enables this event on client processors. Signed-off-by: Stephane Eranian <eranian@google.com> --- arch/x86/kernel/cpu/perf_event_intel_rapl.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index 0e3754e..b2dc346 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c @@ -55,10 +55,13 @@ #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ +#define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */ +#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ /* Clients have PP0, PKG */ #define RAPL_IDX_CLN (1<<RAPL_IDX_PP0_NRG_STAT|\ - 1<<RAPL_IDX_PKG_NRG_STAT) + 1<<RAPL_IDX_PKG_NRG_STAT|\ + 1<<RAPL_IDX_PP1_NRG_STAT) /* Servers have PP0, PKG, RAM */ #define RAPL_IDX_SRV (1<<RAPL_IDX_PP0_NRG_STAT|\ @@ -315,6 +318,10 @@ static int rapl_pmu_event_init(struct perf_event *event) bit = RAPL_IDX_RAM_NRG_STAT; msr = MSR_DRAM_ENERGY_STATUS; break; + case INTEL_RAPL_PP1: + bit = RAPL_IDX_PP1_NRG_STAT; + msr = MSR_PP1_ENERGY_STATUS; + break; default: return -EINVAL; } @@ -369,10 +376,12 @@ static struct attribute_group rapl_pmu_attr_group = { EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02"); EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03"); +EVENT_ATTR_STR(energy-gfx, rapl_gfx, "event=0x04"); EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); +EVENT_ATTR_STR(energy-gfx.unit , rapl_gfx_unit, "Joules"); /* * we compute in 0.23 nJ increments regardless of MSR @@ -380,6 +389,7 @@ EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10"); EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890625e-10"); EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10"); +EVENT_ATTR_STR(energy-gfx.scale, rapl_gfx_scale, "2.3283064365386962890625e-10"); static struct attribute *rapl_events_srv_attr[] = { EVENT_PTR(rapl_cores), @@ -399,12 +409,15 @@ static struct attribute *rapl_events_srv_attr[] = { static struct attribute *rapl_events_cln_attr[] = { EVENT_PTR(rapl_cores), EVENT_PTR(rapl_pkg), + EVENT_PTR(rapl_gfx), EVENT_PTR(rapl_cores_unit), EVENT_PTR(rapl_pkg_unit), + EVENT_PTR(rapl_gfx_unit), EVENT_PTR(rapl_cores_scale), EVENT_PTR(rapl_pkg_scale), + EVENT_PTR(rapl_gfx_scale), NULL, }; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support 2013-12-16 20:20 ` [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support Stephane Eranian @ 2013-12-17 10:42 ` Ingo Molnar 2013-12-17 14:15 ` Ingo Molnar 1 sibling, 0 replies; 7+ messages in thread From: Ingo Molnar @ 2013-12-17 10:42 UTC (permalink / raw) To: Stephane Eranian Cc: linux-kernel, peterz, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver, maria.n.dimakopoulou Nice patch! I noticed a couple of small details: * Stephane Eranian <eranian@google.com> wrote: > Add support for the RAPL energy counter PP1. > > On client processors, it usually correspondss to the s/correspondss /corresponds > energy consumption of the builtin graphic card. > > New event: > - name: power/energy-gfx/ > - code: event=0x4 > - unit: 2^-32 Joules > > On processors without graphics, this should count 0. > The patch only enables this event on client processors. > EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); > EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02"); > EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03"); > +EVENT_ATTR_STR(energy-gfx, rapl_gfx, "event=0x04"); > EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); > EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); > EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); > +EVENT_ATTR_STR(energy-gfx.unit , rapl_gfx_unit, "Joules"); Nit: I think these fields have all similar lengths so they should be vertically aligned, something like: EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); EVENT_ATTR_STR(energy-pkg , rapl_pkg , "event=0x02"); EVENT_ATTR_STR(energy-ram , rapl_ram , "event=0x03"); EVENT_ATTR_STR(energy-gfx , rapl_gfx , "event=0x04"); EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit , "Joules"); EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit , "Joules"); EVENT_ATTR_STR(energy-gfx.unit , rapl_gfx_unit , "Joules"); Also, instead of 'gfx', shouldn't it be 'gpu' throughout the patch? Thanks, Ingo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support 2013-12-16 20:20 ` [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support Stephane Eranian 2013-12-17 10:42 ` Ingo Molnar @ 2013-12-17 14:15 ` Ingo Molnar 1 sibling, 0 replies; 7+ messages in thread From: Ingo Molnar @ 2013-12-17 14:15 UTC (permalink / raw) To: Stephane Eranian Cc: linux-kernel, peterz, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver, maria.n.dimakopoulou * Stephane Eranian <eranian@google.com> wrote: > Add support for the RAPL energy counter PP1. > > On client processors, it usually correspondss to the > energy consumption of the builtin graphic card. > > New event: > - name: power/energy-gfx/ > - code: event=0x4 > - unit: 2^-32 Joules > > On processors without graphics, this should count 0. > The patch only enables this event on client processors. > > Signed-off-by: Stephane Eranian <eranian@google.com> > > --- > arch/x86/kernel/cpu/perf_event_intel_rapl.c | 15 ++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c > index 0e3754e..b2dc346 100644 > --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c > +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c > @@ -55,10 +55,13 @@ > #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ > #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ > #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ > +#define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */ > +#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ Another problem I noticed is that there's a pretty good description at the top of perf_event_intel_rapl.c, but it does not get updated with this new pp1/gfx/gpu angle. Thanks, Ingo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/2] perf/x86: various RAPL improvements 2013-12-16 20:20 [PATCH 0/2] perf/x86: various RAPL improvements Stephane Eranian 2013-12-16 20:20 ` [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support Stephane Eranian 2013-12-16 20:20 ` [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support Stephane Eranian @ 2013-12-17 9:02 ` Peter Zijlstra 2 siblings, 0 replies; 7+ messages in thread From: Peter Zijlstra @ 2013-12-17 9:02 UTC (permalink / raw) To: Stephane Eranian Cc: linux-kernel, mingo, ak, acme, jolsa, zheng.z.yan, bp, vincent.weaver, maria.n.dimakopoulou On Mon, Dec 16, 2013 at 09:20:22PM +0100, Stephane Eranian wrote: > This short patch series provides the following improvements > to the RAPL support for perf_events: > - Intel Haswell Celeron (model 69) support > - support for RAPL PP1 energy counter > > The PP1 counter maps to the builtin graphic card for client > processors. The new energy event is: > - name: power/energy-gfx/ > - code: 0x4 > - unit: Joules > - scaling factor: 2^-32 Joules. > > Signed-off-by: Stephane Eranian <eranian@google.com> Thanks! ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-12-18 10:32 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-12-16 20:20 [PATCH 0/2] perf/x86: various RAPL improvements Stephane Eranian 2013-12-16 20:20 ` [PATCH 1/2] perf/x86: enable Haswell Celeron RAPL support Stephane Eranian 2013-12-18 10:32 ` [tip:perf/core] " tip-bot for Stephane Eranian 2013-12-16 20:20 ` [PATCH 2/2] perf/x86: add RAPL PP1 energy counter support Stephane Eranian 2013-12-17 10:42 ` Ingo Molnar 2013-12-17 14:15 ` Ingo Molnar 2013-12-17 9:02 ` [PATCH 0/2] perf/x86: various RAPL improvements Peter Zijlstra
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