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From: Mike Turquette <mturquette@linaro.org>
To: Tomasz Figa <tomasz.figa@gmail.com>,
	Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andrew Bresticker <abrestic@chromium.org>,
	Tomasz Figa <t.figa@samsung.com>,
	linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
Date: Wed, 18 Dec 2013 11:24:30 -0800	[thread overview]
Message-ID: <20131218192430.23538.93253@quantum> (raw)
In-Reply-To: <CA+Ln22GD5fr4S6aR-+85bdutkeeHmgutLvRWETEQEt1vJX-Y6Q@mail.gmail.com>

Quoting Tomasz Figa (2013-12-18 10:28:57)
> Hi Sachin,
> 
> 2013/12/18 Sachin Kamat <sachin.kamat@linaro.org>:
> > Hi Tomasz,
> >
> > On 10 November 2013 22:38, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> >> Hi Sachin, Andrew,
> >>
> >> On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
> >>> From: Andrew Bresticker <abrestic@chromium.org>
> >>>
> >>> The gate clocks for the MFC sysmmus appear to be flipped, i.e.
> >>> GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr.
> >>> Fix this so that the MFC will start up.
> >>
> >> Wow, this means that there is a mistake in the documentation. Not that
> >> I'm surprised, though.
> >>
> >> I guess you are sure about this, so:
> >>
> >> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
> >
> > I believe you are going to take this through your tree along with a
> > few others which you have already reviewed?
> 
> Thanks for reminding me about this patch. It's been quite a while
> since it was posted
> to the list.
> 
> Yes, I will apply it to samsung-clk tree.

Feel free to add my Ack when you apply it. Will these be sent later as a
pull request for the clk tree?

Regards,
Mike

> 
> Best regards,
> Tomasz

WARNING: multiple messages have this Message-ID (diff)
From: mturquette@linaro.org (Mike Turquette)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
Date: Wed, 18 Dec 2013 11:24:30 -0800	[thread overview]
Message-ID: <20131218192430.23538.93253@quantum> (raw)
In-Reply-To: <CA+Ln22GD5fr4S6aR-+85bdutkeeHmgutLvRWETEQEt1vJX-Y6Q@mail.gmail.com>

Quoting Tomasz Figa (2013-12-18 10:28:57)
> Hi Sachin,
> 
> 2013/12/18 Sachin Kamat <sachin.kamat@linaro.org>:
> > Hi Tomasz,
> >
> > On 10 November 2013 22:38, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> >> Hi Sachin, Andrew,
> >>
> >> On Friday 08 of November 2013 15:44:07 Sachin Kamat wrote:
> >>> From: Andrew Bresticker <abrestic@chromium.org>
> >>>
> >>> The gate clocks for the MFC sysmmus appear to be flipped, i.e.
> >>> GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr.
> >>> Fix this so that the MFC will start up.
> >>
> >> Wow, this means that there is a mistake in the documentation. Not that
> >> I'm surprised, though.
> >>
> >> I guess you are sure about this, so:
> >>
> >> Reviewed-by: Tomasz Figa <t.figa@samsung.com>
> >
> > I believe you are going to take this through your tree along with a
> > few others which you have already reviewed?
> 
> Thanks for reminding me about this patch. It's been quite a while
> since it was posted
> to the list.
> 
> Yes, I will apply it to samsung-clk tree.

Feel free to add my Ack when you apply it. Will these be sent later as a
pull request for the clk tree?

Regards,
Mike

> 
> Best regards,
> Tomasz

  reply	other threads:[~2013-12-18 19:24 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-08 10:14 [PATCH 1/3] clk: exynos5250: save/restore EPLL0 configuration Sachin Kamat
2013-11-08 10:14 ` Sachin Kamat
2013-11-08 10:14 ` [PATCH 2/3] clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks Sachin Kamat
2013-11-08 10:14   ` Sachin Kamat
2013-11-10 17:08   ` Tomasz Figa
2013-11-10 17:08     ` Tomasz Figa
2013-11-11  3:11     ` Sachin Kamat
2013-11-11  3:11       ` Sachin Kamat
2013-12-18 18:09     ` Sachin Kamat
2013-12-18 18:09       ` Sachin Kamat
2013-12-18 18:28       ` Tomasz Figa
2013-12-18 18:28         ` Tomasz Figa
2013-12-18 19:24         ` Mike Turquette [this message]
2013-12-18 19:24           ` Mike Turquette
2013-12-19  0:36           ` Tomasz Figa
2013-12-19  0:36             ` Tomasz Figa
2013-12-19 14:10       ` Tomasz Figa
2013-12-19 14:10         ` Tomasz Figa
2013-12-19 15:35         ` Sachin Kamat
2013-12-19 15:35           ` Sachin Kamat
2013-12-20 21:14           ` Tomasz Figa
2013-12-21  4:07             ` Sachin Kamat
2013-12-30 17:52               ` Tomasz Figa
2013-12-31  2:51                 ` Sachin Kamat
2013-11-08 10:14 ` [PATCH 3/3] clk: exynos5250: register APLL rate table Sachin Kamat
2013-11-08 10:14   ` Sachin Kamat
2013-11-10 17:14   ` Tomasz Figa
2013-11-10 17:14     ` Tomasz Figa
2013-12-19  3:44     ` Sachin Kamat
2013-12-19  3:44       ` Sachin Kamat
2013-12-31  3:16       ` Sachin Kamat
2013-12-31  3:16         ` Sachin Kamat
2014-01-02 15:22         ` Tomasz Figa
2014-01-02 15:22           ` Tomasz Figa
2013-11-08 10:21 ` [PATCH 1/3] clk: exynos5250: save/restore EPLL0 configuration Sachin Kamat
2013-11-08 10:21   ` Sachin Kamat
2013-11-10 17:01 ` Tomasz Figa
2013-11-10 17:01   ` Tomasz Figa

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