From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: Mark Zhang <nvmarkzhang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID
Date: Fri, 20 Dec 2013 13:35:55 +0100 [thread overview]
Message-ID: <20131220123554.GQ27787@ulmo.nvidia.com> (raw)
In-Reply-To: <52B1CCF1.2040907-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1681 bytes --]
On Wed, Dec 18, 2013 at 09:27:29AM -0700, Stephen Warren wrote:
> On 12/18/2013 01:02 AM, Mark Zhang wrote:
> > On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:
> >> Create a header file to define the swgroup IDs used by the IOMMU(SMMU)
> >> binding. "swgroup" is a group of H/W clients which a Tegra SoC
> >> supports. This unique ID can be used to calculate MC_SMMU_<swgroup
> >> name>_ASID_0 register offset and MC_<swgroup name>_HOTRESET_*_0
> >> register bit. This will allow the same header to be used by both
> >> device tree files, and drivers implementing this binding, which
> >> guarantees that the two stay in sync. This also makes device trees
> >> more readable by using names instead of magic numbers. For HOTRESET
> >> bit shifting we need another conversion table, which will come later.
>
> >> diff --git a/include/dt-bindings/memory/tegra-swgroup.h b/include/dt-bindings/memory/tegra-swgroup.h
>
> >> +#define TEGRA_SWGROUP_MPE 11 /* 0x264 */
> >> +#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
> >
> > Need to change this to:
> >
> > #define TEGRA_SWGROUP_MSENC 11
> >
> > The reason is that, this makes "TEGRA_SWGROUP_BIT" doesn't work. So if I
> > write "TEGRA_SWGROUP_CELLS(MSENC)" in dt, that causes a dt compiling error.
>
> I guess it's because TEGRA_SWGROUP_BIT needs to expand its argument
> twice, which can be done.
>
> That all said, just defining all the names directly to constants is
> probably the most direct fix.
Erm... isn't this simply a typo, where:
#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
should simply be
#define TEGRA_SWGROUP_MSENC TEGRA_SWGROUP_MPE
?
That certainly works for me.
Thierry
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID
Date: Fri, 20 Dec 2013 13:35:55 +0100 [thread overview]
Message-ID: <20131220123554.GQ27787@ulmo.nvidia.com> (raw)
In-Reply-To: <52B1CCF1.2040907@wwwdotorg.org>
On Wed, Dec 18, 2013 at 09:27:29AM -0700, Stephen Warren wrote:
> On 12/18/2013 01:02 AM, Mark Zhang wrote:
> > On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:
> >> Create a header file to define the swgroup IDs used by the IOMMU(SMMU)
> >> binding. "swgroup" is a group of H/W clients which a Tegra SoC
> >> supports. This unique ID can be used to calculate MC_SMMU_<swgroup
> >> name>_ASID_0 register offset and MC_<swgroup name>_HOTRESET_*_0
> >> register bit. This will allow the same header to be used by both
> >> device tree files, and drivers implementing this binding, which
> >> guarantees that the two stay in sync. This also makes device trees
> >> more readable by using names instead of magic numbers. For HOTRESET
> >> bit shifting we need another conversion table, which will come later.
>
> >> diff --git a/include/dt-bindings/memory/tegra-swgroup.h b/include/dt-bindings/memory/tegra-swgroup.h
>
> >> +#define TEGRA_SWGROUP_MPE 11 /* 0x264 */
> >> +#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
> >
> > Need to change this to:
> >
> > #define TEGRA_SWGROUP_MSENC 11
> >
> > The reason is that, this makes "TEGRA_SWGROUP_BIT" doesn't work. So if I
> > write "TEGRA_SWGROUP_CELLS(MSENC)" in dt, that causes a dt compiling error.
>
> I guess it's because TEGRA_SWGROUP_BIT needs to expand its argument
> twice, which can be done.
>
> That all said, just defining all the names directly to constants is
> probably the most direct fix.
Erm... isn't this simply a typo, where:
#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
should simply be
#define TEGRA_SWGROUP_MSENC TEGRA_SWGROUP_MPE
?
That certainly works for me.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: Mark Zhang <nvmarkzhang@gmail.com>,
Hiroshi Doyu <hdoyu@nvidia.com>,
swarren@nvidia.com, will.deacon@arm.com, grant.likely@linaro.org,
robherring2@gmail.com, joro@8bytes.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
galak@codeaurora.org, linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID
Date: Fri, 20 Dec 2013 13:35:55 +0100 [thread overview]
Message-ID: <20131220123554.GQ27787@ulmo.nvidia.com> (raw)
In-Reply-To: <52B1CCF1.2040907@wwwdotorg.org>
[-- Attachment #1: Type: text/plain, Size: 1681 bytes --]
On Wed, Dec 18, 2013 at 09:27:29AM -0700, Stephen Warren wrote:
> On 12/18/2013 01:02 AM, Mark Zhang wrote:
> > On 12/12/2013 03:57 PM, Hiroshi Doyu wrote:
> >> Create a header file to define the swgroup IDs used by the IOMMU(SMMU)
> >> binding. "swgroup" is a group of H/W clients which a Tegra SoC
> >> supports. This unique ID can be used to calculate MC_SMMU_<swgroup
> >> name>_ASID_0 register offset and MC_<swgroup name>_HOTRESET_*_0
> >> register bit. This will allow the same header to be used by both
> >> device tree files, and drivers implementing this binding, which
> >> guarantees that the two stay in sync. This also makes device trees
> >> more readable by using names instead of magic numbers. For HOTRESET
> >> bit shifting we need another conversion table, which will come later.
>
> >> diff --git a/include/dt-bindings/memory/tegra-swgroup.h b/include/dt-bindings/memory/tegra-swgroup.h
>
> >> +#define TEGRA_SWGROUP_MPE 11 /* 0x264 */
> >> +#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
> >
> > Need to change this to:
> >
> > #define TEGRA_SWGROUP_MSENC 11
> >
> > The reason is that, this makes "TEGRA_SWGROUP_BIT" doesn't work. So if I
> > write "TEGRA_SWGROUP_CELLS(MSENC)" in dt, that causes a dt compiling error.
>
> I guess it's because TEGRA_SWGROUP_BIT needs to expand its argument
> twice, which can be done.
>
> That all said, just defining all the names directly to constants is
> probably the most direct fix.
Erm... isn't this simply a typo, where:
#define TEGRA_SWGROUP_MSENC SWGROUP_MPE
should simply be
#define TEGRA_SWGROUP_MSENC TEGRA_SWGROUP_MPE
?
That certainly works for me.
Thierry
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
next prev parent reply other threads:[~2013-12-20 12:35 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-12 7:57 [PATCHv7 00/12] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-12 7:57 ` [PATCHv7 01/12] of: introduce of_property_for_each_phandle_with_args() Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 18:29 ` Stephen Warren
2013-12-16 18:29 ` Stephen Warren
2013-12-16 18:29 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 02/12] iommu/of: introduce a global iommu device list Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-3-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 18:32 ` Stephen Warren
2013-12-16 18:32 ` Stephen Warren
2013-12-16 18:32 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 03/12] iommu/of: check if dependee iommu is ready or not Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-4-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 18:34 ` Stephen Warren
2013-12-16 18:34 ` Stephen Warren
2013-12-16 18:34 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 04/12] driver/core: populate devices in order for IOMMUs Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` [PATCHv7 05/12] iommu/core: add ops->{bound,unbind}_driver() Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 18:42 ` Stephen Warren
2013-12-16 18:42 ` Stephen Warren
2013-12-16 18:42 ` Stephen Warren
2013-12-30 13:45 ` Joerg Roedel
2013-12-30 13:45 ` Joerg Roedel
2013-12-30 13:45 ` Joerg Roedel
2013-12-12 7:57 ` [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-7-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-18 8:02 ` Mark Zhang
2013-12-18 8:02 ` Mark Zhang
2013-12-18 8:02 ` Mark Zhang
[not found] ` <52B1568F.1050305-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-12-18 16:27 ` Stephen Warren
2013-12-18 16:27 ` Stephen Warren
2013-12-18 16:27 ` Stephen Warren
[not found] ` <52B1CCF1.2040907-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-12-20 12:35 ` Thierry Reding [this message]
2013-12-20 12:35 ` Thierry Reding
2013-12-20 12:35 ` Thierry Reding
[not found] ` <20131220123554.GQ27787-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>
2013-12-20 17:36 ` Stephen Warren
2013-12-20 17:36 ` Stephen Warren
2013-12-20 17:36 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 07/12] iommu/tegra: smmu: register device to iommu dynamically Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-8-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 18:46 ` Stephen Warren
2013-12-16 18:46 ` Stephen Warren
2013-12-16 18:46 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 08/12] iommu/tegra: smmu: calculate ASID register offset by ID Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-9-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 19:02 ` Stephen Warren
2013-12-16 19:02 ` Stephen Warren
2013-12-16 19:02 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 09/12] iommu/tegra: smmu: get swgroups from DT "iommus=" Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-10-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 19:09 ` Stephen Warren
2013-12-16 19:09 ` Stephen Warren
2013-12-16 19:09 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 10/12] iommu/tegra: smmu: allow duplicate ASID wirte Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` <1386835033-4701-11-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 19:19 ` Stephen Warren
2013-12-16 19:19 ` Stephen Warren
2013-12-16 19:19 ` Stephen Warren
2013-12-12 7:57 ` [PATCHv7 11/12] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` [PATCHv7 12/12] iommu/tegra: smmu: add SMMU to an global iommu list Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
2013-12-12 7:57 ` Hiroshi Doyu
[not found] ` < 1386835033-4701-5-git-send-email-hdoyu@nvidia.com>
[not found] ` <1386835033-4701-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-12 11:39 ` [PATCHv7 04/12] driver/core: populate devices in order for IOMMUs Grant Likely
2013-12-12 11:39 ` Grant Likely
2013-12-12 11:39 ` Grant Likely
[not found] ` <20131212113920.70E8BC40637-WNowdnHR2B42iJbIjFUEsiwD8/FfD2ys@public.gmane.org>
2013-12-13 2:14 ` Greg KH
2013-12-13 2:14 ` Greg KH
2013-12-13 2:14 ` Greg KH
[not found] ` <20131213021402.GB14192-U8xfFu+wG4EAvxtiuMwx3w@public.gmane.org>
2013-12-14 12:24 ` Thierry Reding
2013-12-14 12:24 ` Thierry Reding
2013-12-14 12:24 ` Thierry Reding
2013-12-14 14:28 ` Hiroshi Doyu
2013-12-14 14:28 ` Hiroshi Doyu
2013-12-14 14:28 ` Hiroshi Doyu
2013-12-16 18:26 ` Stephen Warren
2013-12-16 18:26 ` Stephen Warren
2013-12-16 18:26 ` Stephen Warren
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