From: gregkh@linuxfoundation.org (Greg KH)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] misc: xgene: Add base driver for APM X-Gene SoC Queue Manager/Traffic Manager
Date: Sat, 21 Dec 2013 17:01:29 -0800 [thread overview]
Message-ID: <20131222010129.GA16366@kroah.com> (raw)
In-Reply-To: <CAN1v_Pv-RRTW7cr5xNgAMySQrZi9zMxNjJfnKPi8fa3GUhGpNg@mail.gmail.com>
On Sat, Dec 21, 2013 at 04:43:06PM -0800, Ravi Patel wrote:
> > On Thu, Dec 19, 2013 at 07:41:13PM -0800, Ravi Patel wrote:
> >> There is no need to talk to this driver from userspace.
> >> It is a device which is used by other IO devices to communicate with each
> >> other, including CPU.
> >> For example, if CPU (software) wants to send a message to Ethernet HW (i.e.
> >> send packet),
> >> it used this driver to enqueue a message to Ethernet.
> >> In other direction, if Ethernet HW receives a packet, it uses QM/TM device to
> >> send message to
> >> CPU (software) to process packet.
> >
> > So it's a "bus" type of thing, right?
> >
> > My question of "why isn't this reflected in the driver model" still
> > stands.
>
> There is no subsystem underneath QMTM, nor QMTM does any enumeration.
> QMTM is a centralized resource manager which manages queues circularly
> for Ethernet, PktDMA (XOR Engine) and Security Engine subsystems.
> Traffic Management feature of QMTM does flow control, QoS for the subsystems.
> Because of this reasons, its not obvious that QMTM can fit as a bus.
> However we are doing further evalution on this.
Just because you can't enumerate a device, doesn't mean it isn't a
"bus". You say so yourself that this is how devices talk to the
hardware, so that sounds like a "bus" to me...
greg k-h
WARNING: multiple messages have this Message-ID (diff)
From: Greg KH <gregkh@linuxfoundation.org>
To: Ravi Patel <rapatel@apm.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
davem@davemloft.net, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, jcm@redhat.com,
"patches@apm.com" <patches@apm.com>,
Keyur Chudgar <kchudgar@apm.com>
Subject: Re: [PATCH 2/4] misc: xgene: Add base driver for APM X-Gene SoC Queue Manager/Traffic Manager
Date: Sat, 21 Dec 2013 17:01:29 -0800 [thread overview]
Message-ID: <20131222010129.GA16366@kroah.com> (raw)
In-Reply-To: <CAN1v_Pv-RRTW7cr5xNgAMySQrZi9zMxNjJfnKPi8fa3GUhGpNg@mail.gmail.com>
On Sat, Dec 21, 2013 at 04:43:06PM -0800, Ravi Patel wrote:
> > On Thu, Dec 19, 2013 at 07:41:13PM -0800, Ravi Patel wrote:
> >> There is no need to talk to this driver from userspace.
> >> It is a device which is used by other IO devices to communicate with each
> >> other, including CPU.
> >> For example, if CPU (software) wants to send a message to Ethernet HW (i.e.
> >> send packet),
> >> it used this driver to enqueue a message to Ethernet.
> >> In other direction, if Ethernet HW receives a packet, it uses QM/TM device to
> >> send message to
> >> CPU (software) to process packet.
> >
> > So it's a "bus" type of thing, right?
> >
> > My question of "why isn't this reflected in the driver model" still
> > stands.
>
> There is no subsystem underneath QMTM, nor QMTM does any enumeration.
> QMTM is a centralized resource manager which manages queues circularly
> for Ethernet, PktDMA (XOR Engine) and Security Engine subsystems.
> Traffic Management feature of QMTM does flow control, QoS for the subsystems.
> Because of this reasons, its not obvious that QMTM can fit as a bus.
> However we are doing further evalution on this.
Just because you can't enumerate a device, doesn't mean it isn't a
"bus". You say so yourself that this is how devices talk to the
hardware, so that sounds like a "bus" to me...
greg k-h
next prev parent reply other threads:[~2013-12-22 1:01 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-20 2:44 [PATCH 0/4] misc: xgene: Add support for APM X-Gene SoC Queue Manager/Traffic Manager Ravi Patel
2013-12-20 2:44 ` Ravi Patel
2013-12-20 2:44 ` Ravi Patel
2013-12-20 2:45 ` [PATCH 1/4] Documentation: Add documentation for APM X-Gene SoC Queue Manager/Traffic Manager DTS binding Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` [PATCH 2/4] misc: xgene: Add base driver for APM X-Gene SoC Queue Manager/Traffic Manager Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 3:20 ` Greg KH
2013-12-20 3:20 ` Greg KH
2013-12-20 3:20 ` Greg KH
2013-12-22 0:20 ` Ravi Patel
2013-12-22 0:20 ` Ravi Patel
2013-12-22 0:20 ` Ravi Patel
2013-12-22 0:40 ` Greg KH
2013-12-22 0:40 ` Greg KH
2013-12-22 0:40 ` Greg KH
2013-12-20 3:21 ` Greg KH
2013-12-20 3:21 ` Greg KH
[not found] ` <CAN1v_PuBZHN85xTodfSZ-+H4Wdj0T8kSFUJB56KVj9xFH3--JQ@mail.gmail.com>
2013-12-20 4:24 ` Greg KH
2013-12-20 4:24 ` Greg KH
2013-12-20 4:24 ` Greg KH
2013-12-22 0:43 ` Ravi Patel
2013-12-22 0:43 ` Ravi Patel
2013-12-22 1:01 ` Greg KH [this message]
2013-12-22 1:01 ` Greg KH
2013-12-20 2:45 ` [PATCH 3/4] arm64: boot: dts: Add DTS entries " Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` [PATCH 4/4] misc: xgene: Add error handling " Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 2:45 ` Ravi Patel
2013-12-20 3:22 ` [PATCH 0/4] misc: xgene: Add support " Greg KH
2013-12-20 3:22 ` Greg KH
2013-12-20 3:22 ` Greg KH
[not found] ` <CAN1v_PsibDTwQ9_ZxRnBtJA46BPne6fTuS_9TddWPZt6ewwgQQ@mail.gmail.com>
2013-12-20 3:40 ` Greg KH
2013-12-20 3:40 ` Greg KH
2013-12-20 3:40 ` Greg KH
2013-12-20 17:46 ` Ben Hutchings
2013-12-20 17:46 ` Ben Hutchings
2013-12-20 17:46 ` Ben Hutchings
2013-12-20 19:00 ` Greg KH
2013-12-20 19:00 ` Greg KH
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