From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
Date: Mon, 20 Jan 2014 19:41:07 +0100 [thread overview]
Message-ID: <201401201941.07633.arnd@arndb.de> (raw)
In-Reply-To: <CA+mB=1+mrWAzBCxdMEji2MDRzHajmnxuWtz7iu96ML0DuAB3RQ@mail.gmail.com>
On Monday 20 January 2014, Srikanth Thokala wrote:
> >
> >> > * data width should be a property of the slave driver that is configured
> >> > through dma_slave_config(), unless you can have dma engines that only
> >> > support certain a width.
> >>
> >> Yes, this VDMA engine soft IP support only certain widths, which is
> >> configurable during IP synthesis.
> >
> > But what is this property used for in that case? Surely you can't
> > connect a slave device to a dmaengine if the bus width doesn't match.
> > You probably have a point here, but I don't understand it yet.
>
> There is a Data-Realignment Engine (DRE) in the IP which is only available for
> data width setting of 64-bits and less. So, we use the data-width DT parameter
> to verify this condition and we update alignment shift accordingly.
Ok, I have to admit I didn't understand all of that, but you clearly
know what you are talking about here, so I assume you are correct.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: Srikanth Thokala <sthokal-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org,
Grant Likely
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
Date: Mon, 20 Jan 2014 19:41:07 +0100 [thread overview]
Message-ID: <201401201941.07633.arnd@arndb.de> (raw)
In-Reply-To: <CA+mB=1+mrWAzBCxdMEji2MDRzHajmnxuWtz7iu96ML0DuAB3RQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Monday 20 January 2014, Srikanth Thokala wrote:
> >
> >> > * data width should be a property of the slave driver that is configured
> >> > through dma_slave_config(), unless you can have dma engines that only
> >> > support certain a width.
> >>
> >> Yes, this VDMA engine soft IP support only certain widths, which is
> >> configurable during IP synthesis.
> >
> > But what is this property used for in that case? Surely you can't
> > connect a slave device to a dmaengine if the bus width doesn't match.
> > You probably have a point here, but I don't understand it yet.
>
> There is a Data-Realignment Engine (DRE) in the IP which is only available for
> data width setting of 64-bits and less. So, we use the data-width DT parameter
> to verify this condition and we update alignment shift accordingly.
Ok, I have to admit I didn't understand all of that, but you clearly
know what you are talking about here, so I assume you are correct.
Arnd
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WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: Srikanth Thokala <sthokal@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org, dan.j.williams@intel.com,
vinod.koul@intel.com, michal.simek@xilinx.com,
Grant Likely <grant.likely@linaro.org>,
robh+dt@kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
Date: Mon, 20 Jan 2014 19:41:07 +0100 [thread overview]
Message-ID: <201401201941.07633.arnd@arndb.de> (raw)
In-Reply-To: <CA+mB=1+mrWAzBCxdMEji2MDRzHajmnxuWtz7iu96ML0DuAB3RQ@mail.gmail.com>
On Monday 20 January 2014, Srikanth Thokala wrote:
> >
> >> > * data width should be a property of the slave driver that is configured
> >> > through dma_slave_config(), unless you can have dma engines that only
> >> > support certain a width.
> >>
> >> Yes, this VDMA engine soft IP support only certain widths, which is
> >> configurable during IP synthesis.
> >
> > But what is this property used for in that case? Surely you can't
> > connect a slave device to a dmaengine if the bus width doesn't match.
> > You probably have a point here, but I don't understand it yet.
>
> There is a Data-Realignment Engine (DRE) in the IP which is only available for
> data width setting of 64-bits and less. So, we use the data-width DT parameter
> to verify this condition and we update alignment shift accordingly.
Ok, I have to admit I didn't understand all of that, but you clearly
know what you are talking about here, so I assume you are correct.
Arnd
next prev parent reply other threads:[~2014-01-20 18:41 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-16 17:53 [PATCH] Add Xilinx AXI Video DMA Engine driver Srikanth Thokala
2014-01-16 17:53 ` Srikanth Thokala
2014-01-16 17:53 ` [PATCH] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support Srikanth Thokala
2014-01-16 17:53 ` Srikanth Thokala
2014-01-16 18:27 ` Levente Kurusa
2014-01-16 18:27 ` Levente Kurusa
2014-01-16 18:27 ` Levente Kurusa
2014-01-20 7:26 ` Srikanth Thokala
2014-01-20 7:26 ` Srikanth Thokala
2014-01-20 7:26 ` Srikanth Thokala
2014-01-17 14:36 ` Philip Balister
2014-01-17 14:36 ` Philip Balister
2014-01-20 7:27 ` Srikanth Thokala
2014-01-20 7:27 ` Srikanth Thokala
2014-01-20 7:27 ` Srikanth Thokala
2014-01-17 16:13 ` Arnd Bergmann
2014-01-17 16:13 ` Arnd Bergmann
2014-01-17 16:13 ` Arnd Bergmann
2014-01-20 8:00 ` Srikanth Thokala
2014-01-20 8:00 ` Srikanth Thokala
2014-01-20 8:00 ` Srikanth Thokala
2014-01-20 11:39 ` Arnd Bergmann
2014-01-20 11:39 ` Arnd Bergmann
2014-01-20 11:39 ` Arnd Bergmann
2014-01-20 13:35 ` Srikanth Thokala
2014-01-20 13:35 ` Srikanth Thokala
2014-01-20 13:35 ` Srikanth Thokala
2014-01-20 18:41 ` Arnd Bergmann [this message]
2014-01-20 18:41 ` Arnd Bergmann
2014-01-20 18:41 ` Arnd Bergmann
2014-01-17 15:32 ` [PATCH] Add Xilinx AXI Video DMA Engine driver Andy Shevchenko
2014-01-17 15:32 ` Andy Shevchenko
2014-01-17 15:32 ` Andy Shevchenko
2014-01-21 10:21 ` Srikanth Thokala
2014-01-21 10:21 ` Srikanth Thokala
2014-01-21 10:21 ` Srikanth Thokala
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