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From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/6] dt: Update binding information for mvebu gating clocks with Armada 380/385
Date: Mon, 10 Feb 2014 18:59:08 +0100	[thread overview]
Message-ID: <20140210185908.3374eaf6@skate> (raw)
In-Reply-To: <20140210175350.GD9995@lunn.ch>

Dear Andrew Lunn,

On Mon, 10 Feb 2014 18:53:50 +0100, Andrew Lunn wrote:
> > +The following is a list of provided IDs for Armada 380/385:
> > +ID	Clock		Peripheral
> > +-----------------------------------
> > +0	audio		Audio
> > +2	ge2		Gigabit Ethernet 2
> > +3	ge1		Gigabit Ethernet 1
> > +4	ge0		Gigabit Ethernet 0
> > +5	pex1		PCIe 1
> > +6	pex2		PCIe 2
> > +7	pex3		PCIe 3
> > +8	pex4		PCIe 0
> 
> Is that last one a typo? It at least looks a bit odd.

Right, this should be:

	8	pex0		PCIe 0

(just checked again in the datasheet)

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: Gregory CLEMENT
	<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Mike Turquette
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Lior Amsalem <alior-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Tawfik Bayouk <tawfik-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
	Ezequiel Garcia
	<ezequiel.garcia-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Sebastian Hesselbarth
	<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH 6/6] dt: Update binding information for mvebu gating clocks with Armada 380/385
Date: Mon, 10 Feb 2014 18:59:08 +0100	[thread overview]
Message-ID: <20140210185908.3374eaf6@skate> (raw)
In-Reply-To: <20140210175350.GD9995-g2DYL2Zd6BY@public.gmane.org>

Dear Andrew Lunn,

On Mon, 10 Feb 2014 18:53:50 +0100, Andrew Lunn wrote:
> > +The following is a list of provided IDs for Armada 380/385:
> > +ID	Clock		Peripheral
> > +-----------------------------------
> > +0	audio		Audio
> > +2	ge2		Gigabit Ethernet 2
> > +3	ge1		Gigabit Ethernet 1
> > +4	ge0		Gigabit Ethernet 0
> > +5	pex1		PCIe 1
> > +6	pex2		PCIe 2
> > +7	pex3		PCIe 3
> > +8	pex4		PCIe 0
> 
> Is that last one a typo? It at least looks a bit odd.

Right, this should be:

	8	pex0		PCIe 0

(just checked again in the datasheet)

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>,
	Mike Turquette <mturquette@linaro.org>,
	Lior Amsalem <alior@marvell.com>,
	Tawfik Bayouk <tawfik@marvell.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Nadav Haklai <nadavh@marvell.com>,
	Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 6/6] dt: Update binding information for mvebu gating clocks with Armada 380/385
Date: Mon, 10 Feb 2014 18:59:08 +0100	[thread overview]
Message-ID: <20140210185908.3374eaf6@skate> (raw)
In-Reply-To: <20140210175350.GD9995@lunn.ch>

Dear Andrew Lunn,

On Mon, 10 Feb 2014 18:53:50 +0100, Andrew Lunn wrote:
> > +The following is a list of provided IDs for Armada 380/385:
> > +ID	Clock		Peripheral
> > +-----------------------------------
> > +0	audio		Audio
> > +2	ge2		Gigabit Ethernet 2
> > +3	ge1		Gigabit Ethernet 1
> > +4	ge0		Gigabit Ethernet 0
> > +5	pex1		PCIe 1
> > +6	pex2		PCIe 2
> > +7	pex3		PCIe 3
> > +8	pex4		PCIe 0
> 
> Is that last one a typo? It at least looks a bit odd.

Right, this should be:

	8	pex0		PCIe 0

(just checked again in the datasheet)

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

  reply	other threads:[~2014-02-10 17:59 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-10 17:32 [PATCH 0/6] Marvell Armada 375 and 38x clocks drivers Gregory CLEMENT
2014-02-10 17:32 ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 1/6] clk: mvebu: add clock support for Armada 375 Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 2/6] dt: Update binding information for mvebu core clocks with " Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 3/6] dt: Update binding information for mvebu gating " Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 4/6] clk: mvebu: add clock support for Armada 380/385 Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 5/6] dt: Update binding information for mvebu core clocks with " Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:32 ` [PATCH 6/6] dt: Update binding information for mvebu gating " Gregory CLEMENT
2014-02-10 17:32   ` Gregory CLEMENT
2014-02-10 17:53   ` Andrew Lunn
2014-02-10 17:53     ` Andrew Lunn
2014-02-10 17:53     ` Andrew Lunn
2014-02-10 17:59     ` Thomas Petazzoni [this message]
2014-02-10 17:59       ` Thomas Petazzoni
2014-02-10 17:59       ` Thomas Petazzoni
2014-02-11 19:06       ` Jason Cooper
2014-02-11 19:06         ` Jason Cooper
2014-02-11 19:06         ` Jason Cooper
2014-02-17  2:20 ` [PATCH 0/6] Marvell Armada 375 and 38x clocks drivers Jason Cooper
2014-02-17  2:20   ` Jason Cooper
2014-02-17  2:20   ` Jason Cooper

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