From: Mel Gorman <mgorman@suse.de>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: riel@redhat.com, linux-mm@kvack.org, paulus@samba.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 3/3] mm: Use ptep/pmdp_set_numa for updating _PAGE_NUMA bit
Date: Tue, 11 Feb 2014 17:07:24 +0000 [thread overview]
Message-ID: <20140211170724.GM6732@suse.de> (raw)
In-Reply-To: <1392114895-14997-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Tue, Feb 11, 2014 at 04:04:55PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>
> Archs like ppc64 doesn't do tlb flush in set_pte/pmd functions. ppc64 also doesn't implement
> flush_tlb_range. ppc64 require the tlb flushing to be batched within ptl locks. The reason
> to do that is to ensure that the hash page table is in sync with linux page table.
> We track the hpte index in linux pte and if we clear them without flushing hash and drop the
> ptl lock, we can have another cpu update the pte and can end up with double hash. We also want
> to keep set_pte_at simpler by not requiring them to do hash flush for performance reason.
> Hence cannot use them while updating _PAGE_NUMA bit. Add new functions for marking pte/pmd numa
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Mel Gorman <mgorman@suse.de>
--
Mel Gorman
SUSE Labs
WARNING: multiple messages have this Message-ID (diff)
From: Mel Gorman <mgorman@suse.de>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: benh@kernel.crashing.org, paulus@samba.org, riel@redhat.com,
mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org,
linux-mm@kvack.org
Subject: Re: [PATCH 3/3] mm: Use ptep/pmdp_set_numa for updating _PAGE_NUMA bit
Date: Tue, 11 Feb 2014 17:07:24 +0000 [thread overview]
Message-ID: <20140211170724.GM6732@suse.de> (raw)
In-Reply-To: <1392114895-14997-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Tue, Feb 11, 2014 at 04:04:55PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>
> Archs like ppc64 doesn't do tlb flush in set_pte/pmd functions. ppc64 also doesn't implement
> flush_tlb_range. ppc64 require the tlb flushing to be batched within ptl locks. The reason
> to do that is to ensure that the hash page table is in sync with linux page table.
> We track the hpte index in linux pte and if we clear them without flushing hash and drop the
> ptl lock, we can have another cpu update the pte and can end up with double hash. We also want
> to keep set_pte_at simpler by not requiring them to do hash flush for performance reason.
> Hence cannot use them while updating _PAGE_NUMA bit. Add new functions for marking pte/pmd numa
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Mel Gorman <mgorman@suse.de>
--
Mel Gorman
SUSE Labs
--
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next prev parent reply other threads:[~2014-02-11 17:07 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-11 10:34 [PATCH 0/3] powerpc: Fix random application crashes with NUMA_BALANCING enabled Aneesh Kumar K.V
2014-02-11 10:34 ` Aneesh Kumar K.V
2014-02-11 10:34 ` [PATCH 1/3] powerpc: mm: Add new set flag argument to pte/pmd update function Aneesh Kumar K.V
2014-02-11 10:34 ` Aneesh Kumar K.V
2014-02-11 13:54 ` Rik van Riel
2014-02-11 13:54 ` Rik van Riel
2014-02-11 17:00 ` Mel Gorman
2014-02-11 17:00 ` Mel Gorman
2014-02-11 10:34 ` [PATCH 2/3] mm: dirty accountable change only apply to non prot numa case Aneesh Kumar K.V
2014-02-11 10:34 ` Aneesh Kumar K.V
2014-02-11 13:20 ` Rik van Riel
2014-02-11 13:20 ` Rik van Riel
2014-02-11 17:03 ` Mel Gorman
2014-02-11 17:03 ` Mel Gorman
2014-02-11 10:34 ` [PATCH 3/3] mm: Use ptep/pmdp_set_numa for updating _PAGE_NUMA bit Aneesh Kumar K.V
2014-02-11 10:34 ` Aneesh Kumar K.V
2014-02-11 13:25 ` Rik van Riel
2014-02-11 13:25 ` Rik van Riel
2014-02-11 17:07 ` Mel Gorman [this message]
2014-02-11 17:07 ` Mel Gorman
2014-02-11 18:49 ` Benjamin Herrenschmidt
2014-02-11 18:49 ` Benjamin Herrenschmidt
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