From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: "David Lanzendörfer"
<david.lanzendoerfer-Z7Kmv9EsliU@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Ulf Hansson"
<ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Laurent Pinchart"
<laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>,
"Mike Turquette"
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Simon Baatz" <gmbnomis-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Chris Ball" <chris-OsFVWbfNK3isTnJN9+BGXg@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"H Hartley Sweeten"
<hsweeten-3FF4nKcrg1dE2c76skzGb0EOCMrvLtNR@public.gmane.org>,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
"Tejun Heo" <tj-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Guennadi Liakhovetski"
<g.liakhovetski-Mmb7MZpHnFY@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
Date: Sat, 22 Feb 2014 09:31:28 +0100 [thread overview]
Message-ID: <20140222083128.GH3931@lukather> (raw)
In-Reply-To: <5304A042.7090903-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 5035 bytes --]
Hi Hans,
(As a side note, your mailer just did something nasty with the
wrapping which made the code snippets totally unreadable. I'm going to
drop them.)
On Wed, Feb 19, 2014 at 01:14:58PM +0100, Hans de Goede wrote:
> >>>> + wmb(); /* Ensure idma_des hit main mem before we start the idmac */
> >>>
> >>> wmb ensure the proper ordering of the instructions, not flushing
> >>> the caches like what your comment implies.
> >>
> >> Since I put that comment there, allow me to explain. A modern ARM
> >> cpu core has 2 or more units handling stores. One for regular
> >> memory stores, and one for io-mem stores. Regular mem stores can
> >> be re-ordered, io stores cannot. Normally there is no "syncing"
> >> between the 2 store units. Cache flushing is not an issue here
> >> since the memory holding the descriptors for the idma controller
> >> is allocated cache coherent, which on arm means it is not cached.
> >>
> >> What is an issue here is the io-store starting the idmac hitting
> >> the io-mem before the descriptors hit the main-mem, the wmb()
> >> ensures this does not happen.
> >
> > To expand a bit, my point was not that it was functionnally
> > wrong. Since you put a barrier in there, and that it resides in a
> > cache coherent section, we're fine.
> >
> > My point was that the comment itself was misleading.
>
> Well as explained above, the purpose of the wmb is to ensure that
> the descriptors hit main memory, before the following writel (in the
> caller of this function) starts the controller. So I don't see
> exactly how the comment is wrong.
>
> If you've a better wording for the comment, suggestions are welcome.
Your first reply was great :)
But if you feel like it enough, fine.
[ codeless snip..]
> >>> I'd rather put it at a debug loglevel.
> >>
> >> Erm, this only happens if something is seriously wrong.
> >
> > Still. Something would be seriously wrong in the MMC
> > driver/controller. You don't want to bloat the whole kernel logs
> > with the dump of your registers just because the MMC is
> > failing. This is of no interest to anyone but someone that would
> > actually try to debug what's wrong.
>
> This is not a complete register dump, this writes a single line to
> the kernel log saying that an io error happened, and printing the
> error flags set in the status register. We cannot be much shorter
> then this without simply not notifying the user that an io error has
> happened, and not notifying the user is wrong IMHO.
Ok.
> >>>> + /* And put it back in reset */
> >>>> + sunxi_mmc_exit_host(host);
> >>>
> >>> Hu? If it's in reset, how can it generate some IRQs?
> >>
> >> Yes, that is why we do the whole dance of init controller, get
> >> irq, disable irq, drop it back in reset (until the mmc subsys
> >> does a power on of the mmc card / sdio dev).
> >>
> >> Sometime the controller asserts the irq in reset for some reason,
> >> so without the dance as soon as we do the devm_request_irq we get
> >> an irq, and worse, not only do we get an irq, we cannot clear it
> >> since writing to the interrupt status register does not work when
> >> the controller is in reset, so we get stuck re-entering the irq
> >> handler.
> >
> > Hmmm, I see. It probably deserves some commenting here too then.
>
> This call is the mirror of the sunxi_mmc_init_host a few lines
> higher, which has this comment:
>
> /* Make sure the controller is in a sane state before enabling irqs */
>
> Which attempts to explain why we do the init controller, claim irq,
> disable irq, put controller back in reset sequence. Again suggestions
> for a better comment are welcome.
And again, the second part of your first reply was great :)
> >>>> + ret = mmc_add_host(mmc);
> >>>> + if (ret)
> >>>> + goto error_free_dma;
> >>>> +
> >>>> + dev_info(&pdev->dev, "base:0x%p irq:%u\n", host->reg_base, host->irq);
> >>>> + platform_set_drvdata(pdev, mmc);
> >>>
> >>> This should be before the registration. Otherwise, you're racy.
> >>
> >> Nope, we only need this to get the data on sunxi_mmc_remove,
> >> everywhere else the data is found through the mmc-host struct.
> >
> > Still, if anyone makes a following patch using the platform_device
> > for some reason, we will have a race condition, without any way to
> > notice it.
> >
> > Plus, you're doing all the other bits of initialization of your
> > structures much earlier, why not be consistent and having all of
> > them at the same place?
>
> Most platform drivers I've worked on do platform_set_drvdata as late
> as possible, so that the drvdata does not get set and never cleared
> in error paths.
You don't actually have to clear it, and some frameworks actually
require you to call dev_set_drvdata before registration, so that
statement looks quite odd to me.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
Date: Sat, 22 Feb 2014 09:31:28 +0100 [thread overview]
Message-ID: <20140222083128.GH3931@lukather> (raw)
In-Reply-To: <5304A042.7090903@redhat.com>
Hi Hans,
(As a side note, your mailer just did something nasty with the
wrapping which made the code snippets totally unreadable. I'm going to
drop them.)
On Wed, Feb 19, 2014 at 01:14:58PM +0100, Hans de Goede wrote:
> >>>> + wmb(); /* Ensure idma_des hit main mem before we start the idmac */
> >>>
> >>> wmb ensure the proper ordering of the instructions, not flushing
> >>> the caches like what your comment implies.
> >>
> >> Since I put that comment there, allow me to explain. A modern ARM
> >> cpu core has 2 or more units handling stores. One for regular
> >> memory stores, and one for io-mem stores. Regular mem stores can
> >> be re-ordered, io stores cannot. Normally there is no "syncing"
> >> between the 2 store units. Cache flushing is not an issue here
> >> since the memory holding the descriptors for the idma controller
> >> is allocated cache coherent, which on arm means it is not cached.
> >>
> >> What is an issue here is the io-store starting the idmac hitting
> >> the io-mem before the descriptors hit the main-mem, the wmb()
> >> ensures this does not happen.
> >
> > To expand a bit, my point was not that it was functionnally
> > wrong. Since you put a barrier in there, and that it resides in a
> > cache coherent section, we're fine.
> >
> > My point was that the comment itself was misleading.
>
> Well as explained above, the purpose of the wmb is to ensure that
> the descriptors hit main memory, before the following writel (in the
> caller of this function) starts the controller. So I don't see
> exactly how the comment is wrong.
>
> If you've a better wording for the comment, suggestions are welcome.
Your first reply was great :)
But if you feel like it enough, fine.
[ codeless snip..]
> >>> I'd rather put it at a debug loglevel.
> >>
> >> Erm, this only happens if something is seriously wrong.
> >
> > Still. Something would be seriously wrong in the MMC
> > driver/controller. You don't want to bloat the whole kernel logs
> > with the dump of your registers just because the MMC is
> > failing. This is of no interest to anyone but someone that would
> > actually try to debug what's wrong.
>
> This is not a complete register dump, this writes a single line to
> the kernel log saying that an io error happened, and printing the
> error flags set in the status register. We cannot be much shorter
> then this without simply not notifying the user that an io error has
> happened, and not notifying the user is wrong IMHO.
Ok.
> >>>> + /* And put it back in reset */
> >>>> + sunxi_mmc_exit_host(host);
> >>>
> >>> Hu? If it's in reset, how can it generate some IRQs?
> >>
> >> Yes, that is why we do the whole dance of init controller, get
> >> irq, disable irq, drop it back in reset (until the mmc subsys
> >> does a power on of the mmc card / sdio dev).
> >>
> >> Sometime the controller asserts the irq in reset for some reason,
> >> so without the dance as soon as we do the devm_request_irq we get
> >> an irq, and worse, not only do we get an irq, we cannot clear it
> >> since writing to the interrupt status register does not work when
> >> the controller is in reset, so we get stuck re-entering the irq
> >> handler.
> >
> > Hmmm, I see. It probably deserves some commenting here too then.
>
> This call is the mirror of the sunxi_mmc_init_host a few lines
> higher, which has this comment:
>
> /* Make sure the controller is in a sane state before enabling irqs */
>
> Which attempts to explain why we do the init controller, claim irq,
> disable irq, put controller back in reset sequence. Again suggestions
> for a better comment are welcome.
And again, the second part of your first reply was great :)
> >>>> + ret = mmc_add_host(mmc);
> >>>> + if (ret)
> >>>> + goto error_free_dma;
> >>>> +
> >>>> + dev_info(&pdev->dev, "base:0x%p irq:%u\n", host->reg_base, host->irq);
> >>>> + platform_set_drvdata(pdev, mmc);
> >>>
> >>> This should be before the registration. Otherwise, you're racy.
> >>
> >> Nope, we only need this to get the data on sunxi_mmc_remove,
> >> everywhere else the data is found through the mmc-host struct.
> >
> > Still, if anyone makes a following patch using the platform_device
> > for some reason, we will have a race condition, without any way to
> > notice it.
> >
> > Plus, you're doing all the other bits of initialization of your
> > structures much earlier, why not be consistent and having all of
> > them at the same place?
>
> Most platform drivers I've worked on do platform_set_drvdata as late
> as possible, so that the drvdata does not get set and never cleared
> in error paths.
You don't actually have to clear it, and some frameworks actually
require you to call dev_set_drvdata before registration, so that
statement looks quite odd to me.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "David Lanzendörfer" <david.lanzendoerfer@o2s.ch>,
devicetree@vger.kernel.org,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Laurent Pinchart" <laurent.pinchart+renesas@ideasonboard.com>,
"Mike Turquette" <mturquette@linaro.org>,
"Simon Baatz" <gmbnomis@gmail.com>,
"Emilio López" <emilio@elopez.com.ar>,
linux-mmc@vger.kernel.org, "Chris Ball" <chris@printf.net>,
linux-kernel@vger.kernel.org,
"H Hartley Sweeten" <hsweeten@visionengravers.com>,
linux-sunxi@googlegroups.com, "Tejun Heo" <tj@kernel.org>,
"Guennadi Liakhovetski" <g.liakhovetski@gmx.de>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
Date: Sat, 22 Feb 2014 09:31:28 +0100 [thread overview]
Message-ID: <20140222083128.GH3931@lukather> (raw)
In-Reply-To: <5304A042.7090903@redhat.com>
[-- Attachment #1: Type: text/plain, Size: 5035 bytes --]
Hi Hans,
(As a side note, your mailer just did something nasty with the
wrapping which made the code snippets totally unreadable. I'm going to
drop them.)
On Wed, Feb 19, 2014 at 01:14:58PM +0100, Hans de Goede wrote:
> >>>> + wmb(); /* Ensure idma_des hit main mem before we start the idmac */
> >>>
> >>> wmb ensure the proper ordering of the instructions, not flushing
> >>> the caches like what your comment implies.
> >>
> >> Since I put that comment there, allow me to explain. A modern ARM
> >> cpu core has 2 or more units handling stores. One for regular
> >> memory stores, and one for io-mem stores. Regular mem stores can
> >> be re-ordered, io stores cannot. Normally there is no "syncing"
> >> between the 2 store units. Cache flushing is not an issue here
> >> since the memory holding the descriptors for the idma controller
> >> is allocated cache coherent, which on arm means it is not cached.
> >>
> >> What is an issue here is the io-store starting the idmac hitting
> >> the io-mem before the descriptors hit the main-mem, the wmb()
> >> ensures this does not happen.
> >
> > To expand a bit, my point was not that it was functionnally
> > wrong. Since you put a barrier in there, and that it resides in a
> > cache coherent section, we're fine.
> >
> > My point was that the comment itself was misleading.
>
> Well as explained above, the purpose of the wmb is to ensure that
> the descriptors hit main memory, before the following writel (in the
> caller of this function) starts the controller. So I don't see
> exactly how the comment is wrong.
>
> If you've a better wording for the comment, suggestions are welcome.
Your first reply was great :)
But if you feel like it enough, fine.
[ codeless snip..]
> >>> I'd rather put it at a debug loglevel.
> >>
> >> Erm, this only happens if something is seriously wrong.
> >
> > Still. Something would be seriously wrong in the MMC
> > driver/controller. You don't want to bloat the whole kernel logs
> > with the dump of your registers just because the MMC is
> > failing. This is of no interest to anyone but someone that would
> > actually try to debug what's wrong.
>
> This is not a complete register dump, this writes a single line to
> the kernel log saying that an io error happened, and printing the
> error flags set in the status register. We cannot be much shorter
> then this without simply not notifying the user that an io error has
> happened, and not notifying the user is wrong IMHO.
Ok.
> >>>> + /* And put it back in reset */
> >>>> + sunxi_mmc_exit_host(host);
> >>>
> >>> Hu? If it's in reset, how can it generate some IRQs?
> >>
> >> Yes, that is why we do the whole dance of init controller, get
> >> irq, disable irq, drop it back in reset (until the mmc subsys
> >> does a power on of the mmc card / sdio dev).
> >>
> >> Sometime the controller asserts the irq in reset for some reason,
> >> so without the dance as soon as we do the devm_request_irq we get
> >> an irq, and worse, not only do we get an irq, we cannot clear it
> >> since writing to the interrupt status register does not work when
> >> the controller is in reset, so we get stuck re-entering the irq
> >> handler.
> >
> > Hmmm, I see. It probably deserves some commenting here too then.
>
> This call is the mirror of the sunxi_mmc_init_host a few lines
> higher, which has this comment:
>
> /* Make sure the controller is in a sane state before enabling irqs */
>
> Which attempts to explain why we do the init controller, claim irq,
> disable irq, put controller back in reset sequence. Again suggestions
> for a better comment are welcome.
And again, the second part of your first reply was great :)
> >>>> + ret = mmc_add_host(mmc);
> >>>> + if (ret)
> >>>> + goto error_free_dma;
> >>>> +
> >>>> + dev_info(&pdev->dev, "base:0x%p irq:%u\n", host->reg_base, host->irq);
> >>>> + platform_set_drvdata(pdev, mmc);
> >>>
> >>> This should be before the registration. Otherwise, you're racy.
> >>
> >> Nope, we only need this to get the data on sunxi_mmc_remove,
> >> everywhere else the data is found through the mmc-host struct.
> >
> > Still, if anyone makes a following patch using the platform_device
> > for some reason, we will have a race condition, without any way to
> > notice it.
> >
> > Plus, you're doing all the other bits of initialization of your
> > structures much earlier, why not be consistent and having all of
> > them at the same place?
>
> Most platform drivers I've worked on do platform_set_drvdata as late
> as possible, so that the drvdata does not get set and never cleared
> in error paths.
You don't actually have to clear it, and some frameworks actually
require you to call dev_set_drvdata before registration, so that
statement looks quite odd to me.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
[-- Attachment #2: Digital signature --]
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next prev parent reply other threads:[~2014-02-22 8:31 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-17 10:02 [PATCH v7 0/8] ARM: sunxi: Add driver for SD/MMC hosts found on allwinner sunxi SOCs David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217095907.15040.81893.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-17 10:02 ` [PATCH v7 1/8] clk: sunxi: factors: automatic reparenting support David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217100215.15040.63745.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 14:05 ` Maxime Ripard
2014-02-18 14:05 ` Maxime Ripard
2014-02-18 14:05 ` Maxime Ripard
[not found] ` <20140319233945.21989.12073@quantum>
2014-03-20 9:47 ` Maxime Ripard
2014-03-20 9:47 ` Maxime Ripard
2014-03-20 9:47 ` Maxime Ripard
2014-02-17 10:02 ` [PATCH v7 2/8] clk: sunxi: Implement MMC phase control David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217100221.15040.47203.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 14:15 ` Maxime Ripard
2014-02-18 14:15 ` Maxime Ripard
2014-02-18 14:15 ` Maxime Ripard
2014-02-19 5:21 ` Mike Turquette
2014-02-19 5:21 ` Mike Turquette
2014-02-19 8:36 ` Maxime Ripard
2014-02-19 8:36 ` Maxime Ripard
2014-02-23 20:31 ` Mike Turquette
2014-02-23 20:31 ` Mike Turquette
[not found] ` <20140602213134.10062.14293@quantum>
2014-06-05 16:01 ` Maxime Ripard
2014-06-05 16:01 ` Maxime Ripard
2014-02-17 10:02 ` [PATCH v7 3/8] ARM: sunxi: clk: export clk_sunxi_mmc_phase_control David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217100228.15040.32391.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 14:17 ` Maxime Ripard
2014-02-18 14:17 ` Maxime Ripard
2014-02-18 14:17 ` Maxime Ripard
2014-02-17 10:02 ` [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217100234.15040.84232.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 15:37 ` Maxime Ripard
2014-02-18 15:37 ` Maxime Ripard
2014-02-18 15:37 ` Maxime Ripard
2014-02-18 20:49 ` Hans de Goede
2014-02-18 20:49 ` Hans de Goede
[not found] ` <5303C751.5090809-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-02-19 9:46 ` Maxime Ripard
2014-02-19 9:46 ` Maxime Ripard
2014-02-19 9:46 ` Maxime Ripard
2014-02-19 12:14 ` Hans de Goede
2014-02-19 12:14 ` Hans de Goede
2014-02-19 12:14 ` Hans de Goede
[not found] ` <5304A042.7090903-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-02-22 8:31 ` Maxime Ripard [this message]
2014-02-22 8:31 ` Maxime Ripard
2014-02-22 8:31 ` Maxime Ripard
2014-02-22 11:19 ` Hans de Goede
2014-02-22 11:19 ` Hans de Goede
2014-02-22 11:19 ` Hans de Goede
2014-02-17 10:02 ` [PATCH v7 5/8] ARM: dts: sun7i: Add support for mmc David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
[not found] ` <20140217100241.15040.24836.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 14:22 ` Maxime Ripard
2014-02-18 14:22 ` Maxime Ripard
2014-02-18 14:22 ` Maxime Ripard
2014-02-18 15:10 ` Hans de Goede
2014-02-18 15:10 ` Hans de Goede
2014-02-18 15:10 ` Hans de Goede
[not found] ` <530377EE.8010909-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2014-02-21 18:54 ` Maxime Ripard
2014-02-21 18:54 ` Maxime Ripard
2014-02-21 18:54 ` Maxime Ripard
2014-02-17 10:02 ` [PATCH v7 6/8] ARM: dts: sun4i: " David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` [PATCH v7 7/8] ARM: dts: sun5i: " David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:02 ` David Lanzendörfer
2014-02-17 10:03 ` [PATCH v7 8/8] ARM: sunxi: Add documentation for driver for SD/MMC hosts found on Allwinner sunxi SoCs David Lanzendörfer
2014-02-17 10:03 ` David Lanzendörfer
2014-02-17 10:03 ` David Lanzendörfer
[not found] ` <20140217100302.15040.56273.stgit-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-18 15:42 ` Maxime Ripard
2014-02-18 15:42 ` Maxime Ripard
2014-02-18 15:42 ` Maxime Ripard
2014-02-22 7:32 ` David Lanzendörfer
2014-02-22 7:32 ` David Lanzendörfer
2014-02-22 7:32 ` David Lanzendörfer
[not found] ` <1559221.mEv19UvCzF-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-02-22 8:37 ` Maxime Ripard
2014-02-22 8:37 ` Maxime Ripard
2014-02-22 8:37 ` Maxime Ripard
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