Re: [PATCH 2/2] i2c: designware-pci: set ideal HCNT, LCNT and SDA hold time value

[Wolfram Sang <wsa@the-dreams.de>]

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On Mon, Mar 10, 2014 at 11:34:49AM +0000, Chew, Chiau Ee wrote:
> 
> 
> > -----Original Message-----
> > From: Wolfram Sang [mailto:wsa@the-dreams.de]
> > Sent: Sunday, March 09, 2014 5:04 PM
> > To: Chew, Chiau Ee
> > Cc: Mika Westerberg; linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH 2/2] i2c: designware-pci: set ideal HCNT, LCNT and SDA
> > hold time value
> > 
> > On Fri, Mar 07, 2014 at 10:12:51PM +0800, Chew Chiau Ee wrote:
> > > From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> > >
> > > On Intel BayTrail, there was case whereby the resulting fast mode bus
> > > speed becomes slower (~20% slower compared to expected speed) if using
> > > the HCNT/LCNT calculated in the core layer. Thus, this patch is added
> > > to allow pci glue layer to pass in optimal HCNT/LCNT/SDA hold time
> > > values to core layer since the core layer supports cofigurable
> > > HCNT/LCNT/SDA hold time values now.
> > >
> > > Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> > 
> > Can you make use of those instead?
> > 
> >         u32                     sda_falling_time;
> >         u32                     scl_falling_time;
> > 
> > This is more consistent with using sda_hold_time and lets them have a common
> > (and more readable) unit.
> 
> Would like to clarify on your statement above. So you are suggesting to change the following 
> variable name in the code? As in:

Nope. But I had a look and it doesn't make sense to use the above. So,
just forget it :) Will send a second review.


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