From: Ingo Molnar <mingo@kernel.org>
To: Shaohua Li <shli@kernel.org>
Cc: Rik van Riel <riel@redhat.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>,
Andrew Morton <akpm@linux-foundation.org>,
Hugh Dickins <hughd@google.com>, Mel Gorman <mgorman@suse.de>
Subject: Re: [PATCH] x86,mm: delay TLB flush after clearing accessed bit
Date: Wed, 2 Apr 2014 09:46:51 +0200 [thread overview]
Message-ID: <20140402074651.GA22772@gmail.com> (raw)
In-Reply-To: <20140402060601.GA31305@kernel.org>
* Shaohua Li <shli@kernel.org> wrote:
> On Tue, Apr 01, 2014 at 02:31:31PM -0400, Rik van Riel wrote:
> > On 04/01/2014 12:21 PM, Linus Torvalds wrote:
> > > On Tue, Apr 1, 2014 at 9:11 AM, Rik van Riel <riel@redhat.com> wrote:
> > >>
> > >> Memory pressure is not necessarily caused by the same process
> > >> whose accessed bit we just cleared. Memory pressure may not
> > >> even be caused by any process's virtual memory at all, but it
> > >> could be caused by the page cache.
> > >
> > > If we have that much memory pressure on the page cache without having
> > > any memory pressure on the actual VM space, then the swap-out activity
> > > will never be an issue anyway.
> > >
> > > IOW, I think all these scenarios are made-up. I'd much rather go for
> > > simpler implementation, and make things more complex only in the
> > > presence of numbers. Of which we have none.
> >
> > We've been bitten by the lack of a properly tracked accessed
> > bit before, but admittedly that was with the KVM code and EPT.
> >
> > I'll add my Acked-by: to Shaohua's original patch then, and
> > will keep my eyes open for any problems that may or may not
> > materialize...
> >
> > Shaohua?
>
> I'd agree to choose the simple implementation at current stage and check if
> there are problems really.
>
> Andrew,
> can you please pick up my orginal patch "x86: clearing access bit don't
> flush tlb" (with Rik's Ack)? Or I can resend it if you preferred.
Please resend it so I can pick it up for this cycle, that approach
obviously looks good.
Thanks,
Ingo
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WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@kernel.org>
To: Shaohua Li <shli@kernel.org>
Cc: Rik van Riel <riel@redhat.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>,
Andrew Morton <akpm@linux-foundation.org>,
Hugh Dickins <hughd@google.com>, Mel Gorman <mgorman@suse.de>
Subject: Re: [PATCH] x86,mm: delay TLB flush after clearing accessed bit
Date: Wed, 2 Apr 2014 09:46:51 +0200 [thread overview]
Message-ID: <20140402074651.GA22772@gmail.com> (raw)
In-Reply-To: <20140402060601.GA31305@kernel.org>
* Shaohua Li <shli@kernel.org> wrote:
> On Tue, Apr 01, 2014 at 02:31:31PM -0400, Rik van Riel wrote:
> > On 04/01/2014 12:21 PM, Linus Torvalds wrote:
> > > On Tue, Apr 1, 2014 at 9:11 AM, Rik van Riel <riel@redhat.com> wrote:
> > >>
> > >> Memory pressure is not necessarily caused by the same process
> > >> whose accessed bit we just cleared. Memory pressure may not
> > >> even be caused by any process's virtual memory at all, but it
> > >> could be caused by the page cache.
> > >
> > > If we have that much memory pressure on the page cache without having
> > > any memory pressure on the actual VM space, then the swap-out activity
> > > will never be an issue anyway.
> > >
> > > IOW, I think all these scenarios are made-up. I'd much rather go for
> > > simpler implementation, and make things more complex only in the
> > > presence of numbers. Of which we have none.
> >
> > We've been bitten by the lack of a properly tracked accessed
> > bit before, but admittedly that was with the KVM code and EPT.
> >
> > I'll add my Acked-by: to Shaohua's original patch then, and
> > will keep my eyes open for any problems that may or may not
> > materialize...
> >
> > Shaohua?
>
> I'd agree to choose the simple implementation at current stage and check if
> there are problems really.
>
> Andrew,
> can you please pick up my orginal patch "x86: clearing access bit don't
> flush tlb" (with Rik's Ack)? Or I can resend it if you preferred.
Please resend it so I can pick it up for this cycle, that approach
obviously looks good.
Thanks,
Ingo
next prev parent reply other threads:[~2014-04-02 7:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-31 15:34 [PATCH] x86,mm: delay TLB flush after clearing accessed bit Rik van Riel
2014-03-31 15:34 ` Rik van Riel
2014-04-01 10:53 ` Ingo Molnar
2014-04-01 10:53 ` Ingo Molnar
2014-04-01 12:55 ` Rik van Riel
2014-04-01 12:55 ` Rik van Riel
2014-04-01 13:20 ` Ingo Molnar
2014-04-01 13:20 ` Ingo Molnar
2014-04-01 13:26 ` Rik van Riel
2014-04-01 13:26 ` Rik van Riel
2014-04-01 15:13 ` Linus Torvalds
2014-04-01 15:13 ` Linus Torvalds
2014-04-01 16:11 ` Rik van Riel
2014-04-01 16:11 ` Rik van Riel
2014-04-01 16:21 ` Linus Torvalds
2014-04-01 16:21 ` Linus Torvalds
2014-04-01 18:31 ` Rik van Riel
2014-04-01 18:31 ` Rik van Riel
2014-04-02 6:06 ` Shaohua Li
2014-04-02 6:06 ` Shaohua Li
2014-04-02 7:46 ` Ingo Molnar [this message]
2014-04-02 7:46 ` Ingo Molnar
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