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From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/1] AArch64: TCR_TG1_64K incorrectly sets TCR_EL1 bits [31:30]
Date: Thu, 3 Apr 2014 09:58:35 +0100	[thread overview]
Message-ID: <20140403085835.GC17022@arm.com> (raw)
In-Reply-To: <CAHWCVWJKiQxBBR43A3beG9f7dEw4JpkFGZ6V-Es8EAn0uW3WJw@mail.gmail.com>

On Wed, Apr 02, 2014 at 06:21:29PM +0100, Joe Sylve wrote:
> That makes sense and I agree, it's better to fix it now so that it
> will be easier to add 16K paging later (on a side note is there any
> reason not to add it now if someone was willing to do the work?).

See another thread with the Samsung folks about the adding 4-levels of
page tables. We need a bit of refactoring first to decouple the page
size from the number of levels, after that 16K would be relatively easy
(it's easy now as well but I don't see the point on doing it before the
refactoring).

> There was talk in another thread about the possibility of adding a
> pagetable-4K-hwdef.h and pagetable-64K-hwdef.h.  I think this is
> another example of why that might be a good idea as this stuff could
> be moved out of proc.S as to be bit more clean:
> 
> +#ifdef CONFIG_ARM64_64K_PAGES
> +#define TCR_TG_FLAGS   TCR_TG0_64K | TCR_TG1_64K
> +#else
> +#define TCR_TG_FLAGS   TCR_TG0_4K | TCR_TG1_4K
> +#endif

Yes, we could do this when we create the pgtable-*k-hwdef.h files.

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Joe Sylve <joe.sylve@gmail.com>
Cc: Will Deacon <Will.Deacon@arm.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/1] AArch64: TCR_TG1_64K incorrectly sets TCR_EL1 bits [31:30]
Date: Thu, 3 Apr 2014 09:58:35 +0100	[thread overview]
Message-ID: <20140403085835.GC17022@arm.com> (raw)
In-Reply-To: <CAHWCVWJKiQxBBR43A3beG9f7dEw4JpkFGZ6V-Es8EAn0uW3WJw@mail.gmail.com>

On Wed, Apr 02, 2014 at 06:21:29PM +0100, Joe Sylve wrote:
> That makes sense and I agree, it's better to fix it now so that it
> will be easier to add 16K paging later (on a side note is there any
> reason not to add it now if someone was willing to do the work?).

See another thread with the Samsung folks about the adding 4-levels of
page tables. We need a bit of refactoring first to decouple the page
size from the number of levels, after that 16K would be relatively easy
(it's easy now as well but I don't see the point on doing it before the
refactoring).

> There was talk in another thread about the possibility of adding a
> pagetable-4K-hwdef.h and pagetable-64K-hwdef.h.  I think this is
> another example of why that might be a good idea as this stuff could
> be moved out of proc.S as to be bit more clean:
> 
> +#ifdef CONFIG_ARM64_64K_PAGES
> +#define TCR_TG_FLAGS   TCR_TG0_64K | TCR_TG1_64K
> +#else
> +#define TCR_TG_FLAGS   TCR_TG0_4K | TCR_TG1_4K
> +#endif

Yes, we could do this when we create the pgtable-*k-hwdef.h files.

-- 
Catalin

  reply	other threads:[~2014-04-03  8:58 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-02  4:00 [PATCH 1/1] AArch64: TCR_TG1_64K incorrectly sets TCR_EL1 bits [31:30] Joe Sylve
2014-04-02  4:00 ` Joe Sylve
2014-04-02 12:38 ` Catalin Marinas
2014-04-02 12:38   ` Catalin Marinas
2014-04-02 17:07   ` Catalin Marinas
2014-04-02 17:07     ` Catalin Marinas
2014-04-02 17:21     ` Joe Sylve
2014-04-02 17:21       ` Joe Sylve
2014-04-03  8:58       ` Catalin Marinas [this message]
2014-04-03  8:58         ` Catalin Marinas
2014-04-02 21:44     ` Joe Perches
2014-04-02 21:44       ` Joe Perches
2014-04-02 22:10       ` Joe Sylve
2014-04-02 22:10         ` Joe Sylve
2014-04-02 22:16         ` Joe Perches
2014-04-02 22:16           ` Joe Perches
2014-04-02 23:01           ` Joe Sylve
2014-04-02 23:01             ` Joe Sylve

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