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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 00/15] ARM: sunxi: add A31 PL pins support
Date: Thu, 10 Apr 2014 10:16:11 +0200	[thread overview]
Message-ID: <20140410081611.GN28585@lukather> (raw)
In-Reply-To: <CAGb2v651R-sG3OB4aD4UXWiyQVcHz7zXub1wO6B4xp-toUcC7Q@mail.gmail.com>

On Thu, Apr 10, 2014 at 01:14:26AM +0800, Chen-Yu Tsai wrote:
> >  3) other things I haven't noticed yet :-)
> 
> Reworking EINT to use one interrupt per bank will yield some more surprises.
> 
> There's also new gpiolib irqchip helpers, but that will require reworking
> each pin bank into separate gpio chips. May be more work than just adding
> different irq domains for different banks.
> 
> See: https://lkml.org/lkml/2014/3/25/175

I'm not sure it's worth it actually. Using these helpers will probably
simplify the A31/A23 case, where you have one interrupt controller per
bank, but it will be much more complicated to handle the A10/A20 case
where you have a single interrupt controller for all the banks.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: "Boris BREZILLON" <boris.brezillon@free-electrons.com>,
	"Randy Dunlap" <rdunlap@infradead.org>,
	"Emilio López" <emilio@elopez.com.ar>,
	"Mike Turquette" <mturquette@linaro.org>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-doc@vger.kernel.org
Subject: Re: [PATCH 00/15] ARM: sunxi: add A31 PL pins support
Date: Thu, 10 Apr 2014 10:16:11 +0200	[thread overview]
Message-ID: <20140410081611.GN28585@lukather> (raw)
In-Reply-To: <CAGb2v651R-sG3OB4aD4UXWiyQVcHz7zXub1wO6B4xp-toUcC7Q@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 852 bytes --]

On Thu, Apr 10, 2014 at 01:14:26AM +0800, Chen-Yu Tsai wrote:
> >  3) other things I haven't noticed yet :-)
> 
> Reworking EINT to use one interrupt per bank will yield some more surprises.
> 
> There's also new gpiolib irqchip helpers, but that will require reworking
> each pin bank into separate gpio chips. May be more work than just adding
> different irq domains for different banks.
> 
> See: https://lkml.org/lkml/2014/3/25/175

I'm not sure it's worth it actually. Using these helpers will probably
simplify the A31/A23 case, where you have one interrupt controller per
bank, but it will be much more complicated to handle the A10/A20 case
where you have a single interrupt controller for all the banks.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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  parent reply	other threads:[~2014-04-10  8:16 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-09 13:51 [PATCH 00/15] ARM: sunxi: add A31 PL pins support Boris BREZILLON
2014-04-09 13:51 ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 01/15] ARM: sunxi: dt: list all pinctrl compatible strings Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 14:43   ` Maxime Ripard
2014-04-09 14:43     ` Maxime Ripard
2014-04-09 14:43     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 02/15] ARM: sunxi: dt: document pinctrl clock related properties Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 14:45   ` Maxime Ripard
2014-04-09 14:45     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 03/15] ARM: sunxi: dt: add pinctrl clock-names properties Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 04/15] pinctrl: sunxi: specify clk name when retrieving pinctrl pio clk Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-10 18:14   ` Linus Walleij
2014-04-10 18:14     ` Linus Walleij
2014-04-10 18:14     ` Linus Walleij
2014-04-10 18:16     ` Linus Walleij
2014-04-10 18:16       ` Linus Walleij
2014-04-10 21:17       ` Boris BREZILLON
2014-04-10 21:17         ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 05/15] clk: sunxi: add A31 APB0 clk gate defintions Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 14:49   ` Maxime Ripard
2014-04-09 14:49     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 06/15] clk: sunxi: add A31 APB0 gates compatible string to the documentation Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:59   ` Chen-Yu Tsai
2014-04-09 13:59     ` Chen-Yu Tsai
2014-04-09 14:45     ` Boris BREZILLON
2014-04-09 14:45       ` Boris BREZILLON
2014-04-09 14:51   ` Maxime Ripard
2014-04-09 14:51     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 07/15] ARM: sunxi: dt: define A31's APB0 clk gates node Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 14:06   ` Emilio López
2014-04-09 14:06     ` Emilio López
2014-04-09 14:43     ` Boris BREZILLON
2014-04-09 14:43       ` Boris BREZILLON
2014-04-09 15:08   ` Maxime Ripard
2014-04-09 15:08     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 08/15] reset: sunxi: document sunxi's reset controllers bindings Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 09/15] clk: sunxi: add A31 APB0 reset line defintions Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 10/15] pinctrl: sunxi: add PL pin definitions Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 11/15] pinctrl: sunxi: add support for A31 PL pins Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51 ` [PATCH 12/15] pinctrl: sunxi: retrieve and enable PL clk gate for A31 SoC Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 15:33   ` Maxime Ripard
2014-04-09 15:33     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 13/15] pinctrl: sunxi: retrieve and enable PL reset line " Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 15:34   ` Maxime Ripard
2014-04-09 15:34     ` Maxime Ripard
2014-04-09 15:34     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 14/15] pinctrl: sunxi: define A31 PL0/PL1 pins Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 15:38   ` Maxime Ripard
2014-04-09 15:38     ` Maxime Ripard
2014-04-09 13:51 ` [PATCH 15/15] ARM: sunxi: dt: add support for A31's PL pins Boris BREZILLON
2014-04-09 13:51   ` Boris BREZILLON
2014-04-09 14:53 ` [PATCH 00/15] ARM: sunxi: add A31 PL pins support Chen-Yu Tsai
2014-04-09 14:53   ` Chen-Yu Tsai
2014-04-09 15:17   ` Maxime Ripard
2014-04-09 15:17     ` Maxime Ripard
2014-04-09 15:45     ` Maxime Ripard
2014-04-09 15:45       ` Maxime Ripard
2014-04-09 16:27     ` Chen-Yu Tsai
2014-04-09 16:27       ` Chen-Yu Tsai
2014-04-10  8:10       ` Maxime Ripard
2014-04-10  8:10         ` Maxime Ripard
2014-04-10  9:56         ` Chen-Yu Tsai
2014-04-10  9:56           ` Chen-Yu Tsai
2014-04-09 16:14   ` Boris BREZILLON
2014-04-09 16:14     ` Boris BREZILLON
2014-04-09 17:14     ` Chen-Yu Tsai
2014-04-09 17:14       ` Chen-Yu Tsai
2014-04-09 18:04       ` Boris BREZILLON
2014-04-09 18:04         ` Boris BREZILLON
2014-04-10  8:16       ` Maxime Ripard [this message]
2014-04-10  8:16         ` Maxime Ripard

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