Re: [PATCH v4 5/6] ARM: dts: am43x-epos-evm: fix reg and range property of GPMC NAND node

[Tony Lindgren <tony@atomide.com>]

* Pekon Gupta <pekon@ti.com> [140509 13:48]:
> 1) NAND device memory is not directly accessible to CPU, its indirectly accessed
>    via registers. So the 'reg' property for GPMC NAND nodes should be limited to
>    address range of internal GPMC registers only.
> 2) Also, minimum granularity of address space under a GPMC chip-select is 16MB
>    so 'range' property for GPMC NAND node should specify 16MB as its memory-size
> 3) On AM437x, address map of external memory accessible via GPMC starts from 0x0
> 
> Signed-off-by: Pekon Gupta <pekon@ti.com>
> ---
>  arch/arm/boot/dts/am43x-epos-evm.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
> index fd29930..63a6a59 100644
> --- a/arch/arm/boot/dts/am43x-epos-evm.dts
> +++ b/arch/arm/boot/dts/am43x-epos-evm.dts
> @@ -287,9 +287,9 @@
>  	status = "okay";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&nand_flash_x8>;
> -	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
> +	ranges = <0 0 0 0x1000000>;	/* CS0: NAND */
>  	nand@0,0 {
> -		reg = <0 0 0>; /* CS0, offset 0 */
> +		reg = <0 0 0x380>; /* CS0, offset=0, re-map size=0x380 */
>  		ti,nand-ecc-opt = "bch8";
>  		ti,elm-id = <&elm>;
>  		nand-bus-width = <8>;
> 

Here too let's use the standard comments while fixing up the GPMC
ranges.

Tony