* [PATCH v6 0/4] Add STiH407 SoC and reference board support
@ 2014-05-20 9:46 ` Maxime COQUELIN
0 siblings, 0 replies; 22+ messages in thread
From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw)
To: linux-arm-kernel
This series adds basic support to the STMicroelectronics STiH407 SoC and its
B2120 reference board. The STiH407 is a dual-core ARM Cortex-A9 CPU aimed at
STB market.
Changes since v5:
-----------------
- Sort STi boards in DTS'es Makefile
- Re-order compatibles in STi boards from specific to generic
- Only contains DT patches, other patches being merged
Changes since v4:
-----------------
- remove patches already present in v3.15 (pinctrl)
- rebase on top of v3.15-rc2
Changes since v3:
-----------------
- Removed SOC_STIH407 as unused for now
- Cosmetic changes in DT
- Added new lines in pinctrl-st around if:s
- Use ARRAY_SIZE instead of raw values
Changes since v2:
-----------------
- Reordered the pinctrl patches
- Moved stih407_flashdata to stih407 pinctrl patch
Changes since v1:
-----------------
- Changed patch 2 commit title
- Rebased pinctrl patches to linux-pinctrl/devel
- Rebased ARM patches to arm_soc/for-next
Maxime Coquelin (4):
ARM: dts: Sort STi boards in Makefile
ARM: dts: Fix STi boards compatibles
ARM: dts: Add STiH407 SoC support
ARM: dts: STiH407: Add B2120 board support
arch/arm/boot/dts/Makefile | 5 +-
arch/arm/boot/dts/stih407-b2120.dts | 78 +++++
arch/arm/boot/dts/stih407-clock.dtsi | 40 +++
arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++
arch/arm/boot/dts/stih415-b2000.dts | 2 +-
arch/arm/boot/dts/stih415-b2020.dts | 2 +-
arch/arm/boot/dts/stih416-b2000.dts | 3 +-
arch/arm/boot/dts/stih416-b2020.dts | 3 +-
9 files changed, 1003 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/boot/dts/stih407-b2120.dts
create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi
create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/stih407.dtsi
--
1.9.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v6 0/4] Add STiH407 SoC and reference board support @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel Cc: lee.jones This series adds basic support to the STMicroelectronics STiH407 SoC and its B2120 reference board. The STiH407 is a dual-core ARM Cortex-A9 CPU aimed at STB market. Changes since v5: ----------------- - Sort STi boards in DTS'es Makefile - Re-order compatibles in STi boards from specific to generic - Only contains DT patches, other patches being merged Changes since v4: ----------------- - remove patches already present in v3.15 (pinctrl) - rebase on top of v3.15-rc2 Changes since v3: ----------------- - Removed SOC_STIH407 as unused for now - Cosmetic changes in DT - Added new lines in pinctrl-st around if:s - Use ARRAY_SIZE instead of raw values Changes since v2: ----------------- - Reordered the pinctrl patches - Moved stih407_flashdata to stih407 pinctrl patch Changes since v1: ----------------- - Changed patch 2 commit title - Rebased pinctrl patches to linux-pinctrl/devel - Rebased ARM patches to arm_soc/for-next Maxime Coquelin (4): ARM: dts: Sort STi boards in Makefile ARM: dts: Fix STi boards compatibles ARM: dts: Add STiH407 SoC support ARM: dts: STiH407: Add B2120 board support arch/arm/boot/dts/Makefile | 5 +- arch/arm/boot/dts/stih407-b2120.dts | 78 +++++ arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ arch/arm/boot/dts/stih415-b2000.dts | 2 +- arch/arm/boot/dts/stih415-b2020.dts | 2 +- arch/arm/boot/dts/stih416-b2000.dts | 3 +- arch/arm/boot/dts/stih416-b2020.dts | 3 +- 9 files changed, 1003 insertions(+), 8 deletions(-) create mode 100644 arch/arm/boot/dts/stih407-b2120.dts create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/stih407.dtsi -- 1.9.1 ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 1/4] ARM: dts: Sort STi boards in Makefile 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 9:46 ` Maxime COQUELIN -1 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: linux-arm-kernel The boards have to be sorted in alphanumerical order in the Makefile. Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 35c146f..6fa1343 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -336,8 +336,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \ - stih416-b2000.dtb \ stih415-b2020.dtb \ + stih416-b2000.dtb \ stih416-b2020.dtb dtb-$(CONFIG_ARCH_SUNXI) += \ sun4i-a10-a1000.dtb \ -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 1/4] ARM: dts: Sort STi boards in Makefile @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel Cc: lee.jones The boards have to be sorted in alphanumerical order in the Makefile. Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 35c146f..6fa1343 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -336,8 +336,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \ - stih416-b2000.dtb \ stih415-b2020.dtb \ + stih416-b2000.dtb \ stih416-b2020.dtb dtb-$(CONFIG_ARCH_SUNXI) += \ sun4i-a10-a1000.dtb \ -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 1/4] ARM: dts: Sort STi boards in Makefile 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 12:19 ` Lee Jones -1 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:19 UTC (permalink / raw) To: linux-arm-kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > The boards have to be sorted in alphanumerical order in the Makefile. > > Cc: Olof Johansson <olof@lixom.net> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 1/4] ARM: dts: Sort STi boards in Makefile @ 2014-05-20 12:19 ` Lee Jones 0 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:19 UTC (permalink / raw) To: Maxime COQUELIN Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > The boards have to be sorted in alphanumerical order in the Makefile. > > Cc: Olof Johansson <olof@lixom.net> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: linux-arm-kernel The compatible strings have to be ordered from specific to generic. This patch fixes this for STi boards, which did the exact opposite. Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/stih415-b2000.dts | 2 +- arch/arm/boot/dts/stih415-b2020.dts | 2 +- arch/arm/boot/dts/stih416-b2000.dts | 3 +-- arch/arm/boot/dts/stih416-b2020.dts | 3 +-- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/stih415-b2000.dts b/arch/arm/boot/dts/stih415-b2000.dts index d4af531..bdfbd37 100644 --- a/arch/arm/boot/dts/stih415-b2000.dts +++ b/arch/arm/boot/dts/stih415-b2000.dts @@ -11,5 +11,5 @@ #include "stih41x-b2000.dtsi" / { model = "STiH415 B2000 Board"; - compatible = "st,stih415", "st,stih415-b2000"; + compatible = "st,stih415-b2000", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih415-b2020.dts b/arch/arm/boot/dts/stih415-b2020.dts index 442b019..71903a8 100644 --- a/arch/arm/boot/dts/stih415-b2020.dts +++ b/arch/arm/boot/dts/stih415-b2020.dts @@ -11,5 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH415 B2020 Board"; - compatible = "st,stih415", "st,stih415-b2020"; + compatible = "st,stih415-b2020", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih416-b2000.dts b/arch/arm/boot/dts/stih416-b2000.dts index a5eb6ee..488e80a 100644 --- a/arch/arm/boot/dts/stih416-b2000.dts +++ b/arch/arm/boot/dts/stih416-b2000.dts @@ -9,8 +9,7 @@ /dts-v1/; #include "stih416.dtsi" #include "stih41x-b2000.dtsi" - / { - compatible = "st,stih416", "st,stih416-b2000"; model = "STiH416 B2000"; + compatible = "st,stih416-b2000", "st,stih416"; }; diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts index 276f28d..4e2df66 100644 --- a/arch/arm/boot/dts/stih416-b2020.dts +++ b/arch/arm/boot/dts/stih416-b2020.dts @@ -11,6 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH416 B2020"; - compatible = "st,stih416", "st,stih416-b2020"; - + compatible = "st,stih416-b2020", "st,stih416"; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel Cc: lee.jones The compatible strings have to be ordered from specific to generic. This patch fixes this for STi boards, which did the exact opposite. Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/stih415-b2000.dts | 2 +- arch/arm/boot/dts/stih415-b2020.dts | 2 +- arch/arm/boot/dts/stih416-b2000.dts | 3 +-- arch/arm/boot/dts/stih416-b2020.dts | 3 +-- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/stih415-b2000.dts b/arch/arm/boot/dts/stih415-b2000.dts index d4af531..bdfbd37 100644 --- a/arch/arm/boot/dts/stih415-b2000.dts +++ b/arch/arm/boot/dts/stih415-b2000.dts @@ -11,5 +11,5 @@ #include "stih41x-b2000.dtsi" / { model = "STiH415 B2000 Board"; - compatible = "st,stih415", "st,stih415-b2000"; + compatible = "st,stih415-b2000", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih415-b2020.dts b/arch/arm/boot/dts/stih415-b2020.dts index 442b019..71903a8 100644 --- a/arch/arm/boot/dts/stih415-b2020.dts +++ b/arch/arm/boot/dts/stih415-b2020.dts @@ -11,5 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH415 B2020 Board"; - compatible = "st,stih415", "st,stih415-b2020"; + compatible = "st,stih415-b2020", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih416-b2000.dts b/arch/arm/boot/dts/stih416-b2000.dts index a5eb6ee..488e80a 100644 --- a/arch/arm/boot/dts/stih416-b2000.dts +++ b/arch/arm/boot/dts/stih416-b2000.dts @@ -9,8 +9,7 @@ /dts-v1/; #include "stih416.dtsi" #include "stih41x-b2000.dtsi" - / { - compatible = "st,stih416", "st,stih416-b2000"; model = "STiH416 B2000"; + compatible = "st,stih416-b2000", "st,stih416"; }; diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts index 276f28d..4e2df66 100644 --- a/arch/arm/boot/dts/stih416-b2020.dts +++ b/arch/arm/boot/dts/stih416-b2020.dts @@ -11,6 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH416 B2020"; - compatible = "st,stih416", "st,stih416-b2020"; - + compatible = "st,stih416-b2020", "st,stih416"; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-F5mvAk5X5gdBDgjK7y7TUQ Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A The compatible strings have to be ordered from specific to generic. This patch fixes this for STi boards, which did the exact opposite. Cc: Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> Signed-off-by: Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org> --- arch/arm/boot/dts/stih415-b2000.dts | 2 +- arch/arm/boot/dts/stih415-b2020.dts | 2 +- arch/arm/boot/dts/stih416-b2000.dts | 3 +-- arch/arm/boot/dts/stih416-b2020.dts | 3 +-- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/stih415-b2000.dts b/arch/arm/boot/dts/stih415-b2000.dts index d4af531..bdfbd37 100644 --- a/arch/arm/boot/dts/stih415-b2000.dts +++ b/arch/arm/boot/dts/stih415-b2000.dts @@ -11,5 +11,5 @@ #include "stih41x-b2000.dtsi" / { model = "STiH415 B2000 Board"; - compatible = "st,stih415", "st,stih415-b2000"; + compatible = "st,stih415-b2000", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih415-b2020.dts b/arch/arm/boot/dts/stih415-b2020.dts index 442b019..71903a8 100644 --- a/arch/arm/boot/dts/stih415-b2020.dts +++ b/arch/arm/boot/dts/stih415-b2020.dts @@ -11,5 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH415 B2020 Board"; - compatible = "st,stih415", "st,stih415-b2020"; + compatible = "st,stih415-b2020", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih416-b2000.dts b/arch/arm/boot/dts/stih416-b2000.dts index a5eb6ee..488e80a 100644 --- a/arch/arm/boot/dts/stih416-b2000.dts +++ b/arch/arm/boot/dts/stih416-b2000.dts @@ -9,8 +9,7 @@ /dts-v1/; #include "stih416.dtsi" #include "stih41x-b2000.dtsi" - / { - compatible = "st,stih416", "st,stih416-b2000"; model = "STiH416 B2000"; + compatible = "st,stih416-b2000", "st,stih416"; }; diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts index 276f28d..4e2df66 100644 --- a/arch/arm/boot/dts/stih416-b2020.dts +++ b/arch/arm/boot/dts/stih416-b2020.dts @@ -11,6 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH416 B2020"; - compatible = "st,stih416", "st,stih416-b2020"; - + compatible = "st,stih416-b2020", "st,stih416"; }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 12:18 ` Lee Jones -1 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:18 UTC (permalink / raw) To: linux-arm-kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > The compatible strings have to be ordered from specific to generic. > This patch fixes this for STi boards, which did the exact opposite. > > Cc: Olof Johansson <olof@lixom.net> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/stih415-b2000.dts | 2 +- > arch/arm/boot/dts/stih415-b2020.dts | 2 +- > arch/arm/boot/dts/stih416-b2000.dts | 3 +-- > arch/arm/boot/dts/stih416-b2020.dts | 3 +-- > 4 files changed, 4 insertions(+), 6 deletions(-) Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles @ 2014-05-20 12:18 ` Lee Jones 0 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:18 UTC (permalink / raw) To: Maxime COQUELIN Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > The compatible strings have to be ordered from specific to generic. > This patch fixes this for STi boards, which did the exact opposite. > > Cc: Olof Johansson <olof@lixom.net> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/stih415-b2000.dts | 2 +- > arch/arm/boot/dts/stih415-b2020.dts | 2 +- > arch/arm/boot/dts/stih416-b2000.dts | 3 +-- > arch/arm/boot/dts/stih416-b2020.dts | 3 +-- > 4 files changed, 4 insertions(+), 6 deletions(-) Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 9:46 ` Maxime COQUELIN -1 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: linux-arm-kernel The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ 3 files changed, 918 insertions(+) create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/stih407.dtsi diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi new file mode 100644 index 0000000..ae8068c --- /dev/null +++ b/arch/arm/boot/dts/stih407-clock.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2014 STMicroelectronics R&D Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/ { + clocks { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + CLK_SYSIN: CLK_SYSIN { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: arm_periph_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <600000000>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + CLK_EXT2F_A9: clockgenC0 at 13 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "CLK_S_ICN_REG_0"; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi new file mode 100644 index 0000000..74aac5a --- /dev/null +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -0,0 +1,615 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "st-pincfg.h" +#include <dt-bindings/interrupt-controller/arm-gic.h> +/ { + + aliases { + /* 0-5: PIO_SBC */ + gpio0 = &PIO0; + gpio1 = &PIO1; + gpio2 = &PIO2; + gpio3 = &PIO3; + gpio4 = &PIO4; + gpio5 = &PIO5; + /* 10-19: PIO_FRONT0 */ + gpio6 = &PIO10; + gpio7 = &PIO11; + gpio8 = &PIO12; + gpio9 = &PIO13; + gpio10 = &PIO14; + gpio11 = &PIO15; + gpio12 = &PIO16; + gpio13 = &PIO17; + gpio14 = &PIO18; + gpio15 = &PIO19; + /* 20: PIO_FRONT1 */ + gpio16 = &PIO20; + /* 30-35: PIO_REAR */ + gpio17 = &PIO30; + gpio18 = &PIO31; + gpio19 = &PIO32; + gpio20 = &PIO33; + gpio21 = &PIO34; + gpio22 = &PIO35; + /* 40-42: PIO_FLASH */ + gpio23 = &PIO40; + gpio24 = &PIO41; + gpio25 = &PIO42; + }; + + soc { + pin-controller-sbc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-sbc-pinctrl"; + st,syscfg = <&syscfg_sbc>; + reg = <0x0961f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09610000 0x6000>; + + PIO0: gpio at 09610000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO0"; + }; + PIO1: gpio at 09611000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO1"; + }; + PIO2: gpio at 09612000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO2"; + }; + PIO3: gpio at 09613000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO3"; + }; + PIO4: gpio at 09614000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO4"; + }; + + PIO5: gpio at 09615000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO5"; + }; + + rc { + pinctrl_ir: ir0 { + st,pins { + ir = <&PIO4 0 ALT2 IN>; + }; + }; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0 { + pinctrl_sbc_serial0: sbc_serial0-0 { + st,pins { + tx = <&PIO3 4 ALT1 OUT>; + rx = <&PIO3 5 ALT1 IN>; + }; + }; + }; + /* SBC_ASC1 - UART11 */ + sbc_serial1 { + pinctrl_sbc_serial1: sbc_serial1-0 { + st,pins { + tx = <&PIO2 6 ALT3 OUT>; + rx = <&PIO2 7 ALT3 IN>; + }; + }; + }; + + i2c10 { + pinctrl_i2c10_default: i2c10-default { + st,pins { + sda = <&PIO4 6 ALT1 BIDIR>; + scl = <&PIO4 5 ALT1 BIDIR>; + }; + }; + }; + + i2c11 { + pinctrl_i2c11_default: i2c11-default { + st,pins { + sda = <&PIO5 1 ALT1 BIDIR>; + scl = <&PIO5 0 ALT1 BIDIR>; + }; + }; + }; + + keyscan { + pinctrl_keyscan: keyscan { + st,pins { + keyin0 = <&PIO4 0 ALT6 IN>; + keyin1 = <&PIO4 5 ALT4 IN>; + keyin2 = <&PIO0 4 ALT2 IN>; + keyin3 = <&PIO2 6 ALT2 IN>; + + keyout0 = <&PIO4 6 ALT4 OUT>; + keyout1 = <&PIO1 7 ALT2 OUT>; + keyout2 = <&PIO0 6 ALT2 OUT>; + keyout3 = <&PIO2 7 ALT2 OUT>; + }; + }; + }; + + gmac1 { + /* + * Almost all the boards based on STiH407 SoC have an embedded + * switch where the mdio/mdc have been used for managing the SMI + * iface via I2C. For this reason these lines can be allocated + * by using dedicated configuration (in case of there will be a + * standard PHY transceiver on-board). + */ + pinctrl_rgmii1: rgmii1-0 { + st,pins { + + txd0 = <&PIO0 0 ALT1 OUT DE_IO 0 CLK_A>; + txd1 = <&PIO0 1 ALT1 OUT DE_IO 0 CLK_A>; + txd2 = <&PIO0 2 ALT1 OUT DE_IO 0 CLK_A>; + txd3 = <&PIO0 3 ALT1 OUT DE_IO 0 CLK_A>; + txen = <&PIO0 5 ALT1 OUT DE_IO 0 CLK_A>; + txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; + rxd0 = <&PIO1 4 ALT1 IN DE_IO 0 CLK_A>; + rxd1 = <&PIO1 5 ALT1 IN DE_IO 0 CLK_A>; + rxd2 = <&PIO1 6 ALT1 IN DE_IO 0 CLK_A>; + rxd3 = <&PIO1 7 ALT1 IN DE_IO 0 CLK_A>; + rxdv = <&PIO2 0 ALT1 IN DE_IO 0 CLK_A>; + rxclk = <&PIO2 2 ALT1 IN NICLK 500 CLK_A>; + clk125 = <&PIO3 7 ALT4 IN NICLK 0 CLK_A>; + phyclk = <&PIO2 3 ALT4 OUT NICLK 1750 CLK_B>; + }; + }; + + pinctrl_rgmii1_mdio: rgmii1-mdio { + st,pins { + mdio = <&PIO1 0 ALT1 OUT BYPASS 0>; + mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; + mdint = <&PIO1 3 ALT1 IN BYPASS 0>; + }; + }; + + pinctrl_mii1: mii1 { + st,pins { + txd0 = <&PIO0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd1 = <&PIO0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd2 = <&PIO0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd3 = <&PIO0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txer = <&PIO0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txen = <&PIO0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; + col = <&PIO0 7 ALT1 IN BYPASS 1000>; + + mdio = <&PIO1 0 ALT1 OUT BYPASS 1500>; + mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; + crs = <&PIO1 2 ALT1 IN BYPASS 1000>; + mdint = <&PIO1 3 ALT1 IN BYPASS 0>; + rxd0 = <&PIO1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd1 = <&PIO1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd2 = <&PIO1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd3 = <&PIO1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; + + rxdv = <&PIO2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rx_er = <&PIO2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxclk = <&PIO2 2 ALT1 IN NICLK 0 CLK_A>; + phyclk = <&PIO2 3 ALT1 OUT NICLK 0 CLK_A>; + }; + }; + }; + + pwm1 { + pinctrl_pwm1_chan0_default: pwm1-0-default { + st,pins { + pwm-out = <&PIO3 0 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan1_default: pwm1-1-default { + st,pins { + pwm-out = <&PIO4 4 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan2_default: pwm1-2-default { + st,pins { + pwm-out = <&PIO4 6 ALT3 OUT>; + }; + }; + pinctrl_pwm1_chan3_default: pwm1-3-default { + st,pins { + pwm-out = <&PIO4 7 ALT3 OUT>; + }; + }; + }; + }; + + pin-controller-front0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0920f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09200000 0x10000>; + + PIO10: PIO at 09200000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO10"; + }; + PIO11: PIO at 09201000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO11"; + }; + PIO12: PIO at 09202000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO12"; + }; + PIO13: PIO at 09203000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO13"; + }; + PIO14: PIO at 09204000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO14"; + }; + PIO15: PIO at 09205000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO15"; + }; + PIO16: PIO at 09206000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x6000 0x100>; + st,bank-name = "PIO16"; + }; + PIO17: PIO at 09207000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x7000 0x100>; + st,bank-name = "PIO17"; + }; + PIO18: PIO at 09208000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x8000 0x100>; + st,bank-name = "PIO18"; + }; + PIO19: PIO at 09209000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x9000 0x100>; + st,bank-name = "PIO19"; + }; + + /* Comms */ + serial0 { + pinctrl_serial0: serial0-0 { + st,pins { + tx = <&PIO17 0 ALT1 OUT>; + rx = <&PIO17 1 ALT1 IN>; + }; + }; + }; + + serial1 { + pinctrl_serial1: serial1-0 { + st,pins { + tx = <&PIO16 0 ALT1 OUT>; + rx = <&PIO16 1 ALT1 IN>; + }; + }; + }; + + serial2 { + pinctrl_serial2: serial2-0 { + st,pins { + tx = <&PIO15 0 ALT1 OUT>; + rx = <&PIO15 1 ALT1 IN>; + }; + }; + }; + + mmc1 { + pinctrl_sd1: sd1-0 { + st,pins { + sd_clk = <&PIO19 3 ALT5 BIDIR NICLK 0 CLK_B>; + sd_cmd = <&PIO19 2 ALT5 BIDIR_PU BYPASS 0>; + sd_dat0 = <&PIO19 4 ALT5 BIDIR_PU BYPASS 0>; + sd_dat1 = <&PIO19 5 ALT5 BIDIR_PU BYPASS 0>; + sd_dat2 = <&PIO19 6 ALT5 BIDIR_PU BYPASS 0>; + sd_dat3 = <&PIO19 7 ALT5 BIDIR_PU BYPASS 0>; + sd_led = <&PIO16 6 ALT6 OUT>; + sd_pwren = <&PIO16 7 ALT6 OUT>; + sd_cd = <&PIO19 0 ALT6 IN>; + sd_wp = <&PIO19 1 ALT6 IN>; + }; + }; + }; + + + i2c0 { + pinctrl_i2c0_default: i2c0-default { + st,pins { + sda = <&PIO10 6 ALT2 BIDIR>; + scl = <&PIO10 5 ALT2 BIDIR>; + }; + }; + }; + + i2c1 { + pinctrl_i2c1_default: i2c1-default { + st,pins { + sda = <&PIO11 1 ALT2 BIDIR>; + scl = <&PIO11 0 ALT2 BIDIR>; + }; + }; + }; + + i2c2 { + pinctrl_i2c2_default: i2c2-default { + st,pins { + sda = <&PIO15 6 ALT2 BIDIR>; + scl = <&PIO15 5 ALT2 BIDIR>; + }; + }; + }; + + i2c3 { + pinctrl_i2c3_default: i2c3-default { + st,pins { + sda = <&PIO18 6 ALT1 BIDIR>; + scl = <&PIO18 5 ALT1 BIDIR>; + }; + }; + }; + + spi0 { + pinctrl_spi0_default: spi0-default { + st,pins { + mtsr = <&PIO12 6 ALT2 BIDIR>; + mrst = <&PIO12 7 ALT2 BIDIR>; + scl = <&PIO12 5 ALT2 BIDIR>; + }; + }; + }; + }; + + pin-controller-front1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0921f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09210000 0x10000>; + + PIO20: PIO at 09210000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO20"; + }; + }; + + pin-controller-rear { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-rear-pinctrl"; + st,syscfg = <&syscfg_rear>; + reg = <0x0922f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09220000 0x6000>; + + PIO30: gpio at 09220000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO30"; + }; + PIO31: gpio at 09221000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO31"; + }; + PIO32: gpio at 09222000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO32"; + }; + PIO33: gpio at 09223000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO33"; + }; + PIO34: gpio at 09224000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO34"; + }; + PIO35: gpio at 09225000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO35"; + }; + + i2c4 { + pinctrl_i2c4_default: i2c4-default { + st,pins { + sda = <&PIO30 1 ALT1 BIDIR>; + scl = <&PIO30 0 ALT1 BIDIR>; + }; + }; + }; + + i2c5 { + pinctrl_i2c5_default: i2c5-default { + st,pins { + sda = <&PIO34 4 ALT1 BIDIR>; + scl = <&PIO34 3 ALT1 BIDIR>; + }; + }; + }; + + usb3 { + pinctrl_usb3: usb3-2 { + st,pins { + usb-oc-detect = <&PIO35 4 ALT1 IN>; + usb-pwr-enable = <&PIO35 5 ALT1 OUT>; + usb-vbus-valid = <&PIO35 6 ALT1 IN>; + }; + }; + }; + + pwm0 { + pinctrl_pwm0_chan0_default: pwm0-0-default { + st,pins { + pwm-out = <&PIO31 1 ALT1 OUT>; + }; + }; + }; + }; + + pin-controller-flash { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-flash-pinctrl"; + st,syscfg = <&syscfg_flash>; + reg = <0x0923f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09230000 0x3000>; + + PIO40: gpio at 09230000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0 0x100>; + st,bank-name = "PIO40"; + }; + PIO41: gpio at 09231000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO41"; + }; + PIO42: gpio at 09232000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO42"; + }; + + mmc0 { + pinctrl_mmc0: mmc0-0 { + st,pins { + emmc_clk = <&PIO40 6 ALT1 BIDIR>; + emmc_cmd = <&PIO40 7 ALT1 BIDIR_PU>; + emmc_d0 = <&PIO41 0 ALT1 BIDIR_PU>; + emmc_d1 = <&PIO41 1 ALT1 BIDIR_PU>; + emmc_d2 = <&PIO41 2 ALT1 BIDIR_PU>; + emmc_d3 = <&PIO41 3 ALT1 BIDIR_PU>; + emmc_d4 = <&PIO41 4 ALT1 BIDIR_PU>; + emmc_d5 = <&PIO41 5 ALT1 BIDIR_PU>; + emmc_d6 = <&PIO41 6 ALT1 BIDIR_PU>; + emmc_d7 = <&PIO41 7 ALT1 BIDIR_PU>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi new file mode 100644 index 0000000..b14a377 --- /dev/null +++ b/arch/arm/boot/dts/stih407.dtsi @@ -0,0 +1,263 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih407-clock.dtsi" +#include "stih407-pinctrl.dtsi" +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + intc: interrupt-controller at 08761000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x08761000 0x1000>, <0x08760100 0x100>; + }; + + scu at 08760000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x08760000 0x1000>; + }; + + timer at 08760200 { + interrupt-parent = <&intc>; + compatible = "arm,cortex-a9-global-timer"; + reg = <0x08760200 0x100>; + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&arm_periph_clk>; + }; + + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0x08762000 0x1000>; + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + cache-unified; + cache-level = <2>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + compatible = "simple-bus"; + + syscfg_sbc: sbc-syscfg at 9620000 { + compatible = "st,stih407-sbc-syscfg", "syscon"; + reg = <0x9620000 0x1000>; + }; + + syscfg_front: front-syscfg at 9280000 { + compatible = "st,stih407-front-syscfg", "syscon"; + reg = <0x9280000 0x1000>; + }; + + syscfg_rear: rear-syscfg at 9290000 { + compatible = "st,stih407-rear-syscfg", "syscon"; + reg = <0x9290000 0x1000>; + }; + + syscfg_flash: flash-syscfg at 92a0000 { + compatible = "st,stih407-flash-syscfg", "syscon"; + reg = <0x92a0000 0x1000>; + }; + + syscfg_sbc_reg: fvdp-lite-syscfg at 9600000 { + compatible = "st,stih407-sbc-reg-syscfg", "syscon"; + reg = <0x9600000 0x1000>; + }; + + syscfg_core: core-syscfg at 92b0000 { + compatible = "st,stih407-core-syscfg", "syscon"; + reg = <0x92b0000 0x1000>; + }; + + syscfg_lpm: lpm-syscfg at 94b5100 { + compatible = "st,stih407-lpm-syscfg", "syscon"; + reg = <0x94b5100 0x1000>; + }; + + serial at 9830000 { + compatible = "st,asc"; + reg = <0x9830000 0x2c>; + interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial0>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + serial at 9831000 { + compatible = "st,asc"; + reg = <0x9831000 0x2c>; + interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial1>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + serial at 9832000 { + compatible = "st,asc"; + reg = <0x9832000 0x2c>; + interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial2>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0: serial at 9530000 { + compatible = "st,asc"; + reg = <0x9530000 0x2c>; + interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial0>; + clocks = <&CLK_SYSIN>; + + status = "disabled"; + }; + + serial at 9531000 { + compatible = "st,asc"; + reg = <0x9531000 0x2c>; + interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial1>; + clocks = <&CLK_SYSIN>; + + status = "disabled"; + }; + + i2c at 9840000 { + compatible = "st,comms-ssc4-i2c"; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x9840000 0x110>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + + status = "disabled"; + }; + + i2c at 9841000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9841000 0x110>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + + status = "disabled"; + }; + + i2c at 9842000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9842000 0x110>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_default>; + + status = "disabled"; + }; + + i2c at 9843000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9843000 0x110>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_default>; + + status = "disabled"; + }; + + i2c at 9844000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9844000 0x110>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_default>; + + status = "disabled"; + }; + + i2c at 9845000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9845000 0x110>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5_default>; + + status = "disabled"; + }; + + + /* SSCs on SBC */ + i2c at 9540000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9540000 0x110>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c10_default>; + + status = "disabled"; + }; + + i2c at 9541000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9541000 0x110>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c11_default>; + + status = "disabled"; + }; + }; +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel Cc: lee.jones The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ 3 files changed, 918 insertions(+) create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/stih407.dtsi diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi new file mode 100644 index 0000000..ae8068c --- /dev/null +++ b/arch/arm/boot/dts/stih407-clock.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2014 STMicroelectronics R&D Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/ { + clocks { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + CLK_SYSIN: CLK_SYSIN { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: arm_periph_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <600000000>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + CLK_EXT2F_A9: clockgenC0@13 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "CLK_S_ICN_REG_0"; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi new file mode 100644 index 0000000..74aac5a --- /dev/null +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -0,0 +1,615 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "st-pincfg.h" +#include <dt-bindings/interrupt-controller/arm-gic.h> +/ { + + aliases { + /* 0-5: PIO_SBC */ + gpio0 = &PIO0; + gpio1 = &PIO1; + gpio2 = &PIO2; + gpio3 = &PIO3; + gpio4 = &PIO4; + gpio5 = &PIO5; + /* 10-19: PIO_FRONT0 */ + gpio6 = &PIO10; + gpio7 = &PIO11; + gpio8 = &PIO12; + gpio9 = &PIO13; + gpio10 = &PIO14; + gpio11 = &PIO15; + gpio12 = &PIO16; + gpio13 = &PIO17; + gpio14 = &PIO18; + gpio15 = &PIO19; + /* 20: PIO_FRONT1 */ + gpio16 = &PIO20; + /* 30-35: PIO_REAR */ + gpio17 = &PIO30; + gpio18 = &PIO31; + gpio19 = &PIO32; + gpio20 = &PIO33; + gpio21 = &PIO34; + gpio22 = &PIO35; + /* 40-42: PIO_FLASH */ + gpio23 = &PIO40; + gpio24 = &PIO41; + gpio25 = &PIO42; + }; + + soc { + pin-controller-sbc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-sbc-pinctrl"; + st,syscfg = <&syscfg_sbc>; + reg = <0x0961f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09610000 0x6000>; + + PIO0: gpio@09610000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO0"; + }; + PIO1: gpio@09611000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO1"; + }; + PIO2: gpio@09612000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO2"; + }; + PIO3: gpio@09613000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO3"; + }; + PIO4: gpio@09614000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO4"; + }; + + PIO5: gpio@09615000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO5"; + }; + + rc { + pinctrl_ir: ir0 { + st,pins { + ir = <&PIO4 0 ALT2 IN>; + }; + }; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0 { + pinctrl_sbc_serial0: sbc_serial0-0 { + st,pins { + tx = <&PIO3 4 ALT1 OUT>; + rx = <&PIO3 5 ALT1 IN>; + }; + }; + }; + /* SBC_ASC1 - UART11 */ + sbc_serial1 { + pinctrl_sbc_serial1: sbc_serial1-0 { + st,pins { + tx = <&PIO2 6 ALT3 OUT>; + rx = <&PIO2 7 ALT3 IN>; + }; + }; + }; + + i2c10 { + pinctrl_i2c10_default: i2c10-default { + st,pins { + sda = <&PIO4 6 ALT1 BIDIR>; + scl = <&PIO4 5 ALT1 BIDIR>; + }; + }; + }; + + i2c11 { + pinctrl_i2c11_default: i2c11-default { + st,pins { + sda = <&PIO5 1 ALT1 BIDIR>; + scl = <&PIO5 0 ALT1 BIDIR>; + }; + }; + }; + + keyscan { + pinctrl_keyscan: keyscan { + st,pins { + keyin0 = <&PIO4 0 ALT6 IN>; + keyin1 = <&PIO4 5 ALT4 IN>; + keyin2 = <&PIO0 4 ALT2 IN>; + keyin3 = <&PIO2 6 ALT2 IN>; + + keyout0 = <&PIO4 6 ALT4 OUT>; + keyout1 = <&PIO1 7 ALT2 OUT>; + keyout2 = <&PIO0 6 ALT2 OUT>; + keyout3 = <&PIO2 7 ALT2 OUT>; + }; + }; + }; + + gmac1 { + /* + * Almost all the boards based on STiH407 SoC have an embedded + * switch where the mdio/mdc have been used for managing the SMI + * iface via I2C. For this reason these lines can be allocated + * by using dedicated configuration (in case of there will be a + * standard PHY transceiver on-board). + */ + pinctrl_rgmii1: rgmii1-0 { + st,pins { + + txd0 = <&PIO0 0 ALT1 OUT DE_IO 0 CLK_A>; + txd1 = <&PIO0 1 ALT1 OUT DE_IO 0 CLK_A>; + txd2 = <&PIO0 2 ALT1 OUT DE_IO 0 CLK_A>; + txd3 = <&PIO0 3 ALT1 OUT DE_IO 0 CLK_A>; + txen = <&PIO0 5 ALT1 OUT DE_IO 0 CLK_A>; + txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; + rxd0 = <&PIO1 4 ALT1 IN DE_IO 0 CLK_A>; + rxd1 = <&PIO1 5 ALT1 IN DE_IO 0 CLK_A>; + rxd2 = <&PIO1 6 ALT1 IN DE_IO 0 CLK_A>; + rxd3 = <&PIO1 7 ALT1 IN DE_IO 0 CLK_A>; + rxdv = <&PIO2 0 ALT1 IN DE_IO 0 CLK_A>; + rxclk = <&PIO2 2 ALT1 IN NICLK 500 CLK_A>; + clk125 = <&PIO3 7 ALT4 IN NICLK 0 CLK_A>; + phyclk = <&PIO2 3 ALT4 OUT NICLK 1750 CLK_B>; + }; + }; + + pinctrl_rgmii1_mdio: rgmii1-mdio { + st,pins { + mdio = <&PIO1 0 ALT1 OUT BYPASS 0>; + mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; + mdint = <&PIO1 3 ALT1 IN BYPASS 0>; + }; + }; + + pinctrl_mii1: mii1 { + st,pins { + txd0 = <&PIO0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd1 = <&PIO0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd2 = <&PIO0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd3 = <&PIO0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txer = <&PIO0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txen = <&PIO0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; + col = <&PIO0 7 ALT1 IN BYPASS 1000>; + + mdio = <&PIO1 0 ALT1 OUT BYPASS 1500>; + mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; + crs = <&PIO1 2 ALT1 IN BYPASS 1000>; + mdint = <&PIO1 3 ALT1 IN BYPASS 0>; + rxd0 = <&PIO1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd1 = <&PIO1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd2 = <&PIO1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd3 = <&PIO1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; + + rxdv = <&PIO2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rx_er = <&PIO2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxclk = <&PIO2 2 ALT1 IN NICLK 0 CLK_A>; + phyclk = <&PIO2 3 ALT1 OUT NICLK 0 CLK_A>; + }; + }; + }; + + pwm1 { + pinctrl_pwm1_chan0_default: pwm1-0-default { + st,pins { + pwm-out = <&PIO3 0 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan1_default: pwm1-1-default { + st,pins { + pwm-out = <&PIO4 4 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan2_default: pwm1-2-default { + st,pins { + pwm-out = <&PIO4 6 ALT3 OUT>; + }; + }; + pinctrl_pwm1_chan3_default: pwm1-3-default { + st,pins { + pwm-out = <&PIO4 7 ALT3 OUT>; + }; + }; + }; + }; + + pin-controller-front0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0920f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09200000 0x10000>; + + PIO10: PIO@09200000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO10"; + }; + PIO11: PIO@09201000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO11"; + }; + PIO12: PIO@09202000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO12"; + }; + PIO13: PIO@09203000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO13"; + }; + PIO14: PIO@09204000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO14"; + }; + PIO15: PIO@09205000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO15"; + }; + PIO16: PIO@09206000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x6000 0x100>; + st,bank-name = "PIO16"; + }; + PIO17: PIO@09207000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x7000 0x100>; + st,bank-name = "PIO17"; + }; + PIO18: PIO@09208000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x8000 0x100>; + st,bank-name = "PIO18"; + }; + PIO19: PIO@09209000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x9000 0x100>; + st,bank-name = "PIO19"; + }; + + /* Comms */ + serial0 { + pinctrl_serial0: serial0-0 { + st,pins { + tx = <&PIO17 0 ALT1 OUT>; + rx = <&PIO17 1 ALT1 IN>; + }; + }; + }; + + serial1 { + pinctrl_serial1: serial1-0 { + st,pins { + tx = <&PIO16 0 ALT1 OUT>; + rx = <&PIO16 1 ALT1 IN>; + }; + }; + }; + + serial2 { + pinctrl_serial2: serial2-0 { + st,pins { + tx = <&PIO15 0 ALT1 OUT>; + rx = <&PIO15 1 ALT1 IN>; + }; + }; + }; + + mmc1 { + pinctrl_sd1: sd1-0 { + st,pins { + sd_clk = <&PIO19 3 ALT5 BIDIR NICLK 0 CLK_B>; + sd_cmd = <&PIO19 2 ALT5 BIDIR_PU BYPASS 0>; + sd_dat0 = <&PIO19 4 ALT5 BIDIR_PU BYPASS 0>; + sd_dat1 = <&PIO19 5 ALT5 BIDIR_PU BYPASS 0>; + sd_dat2 = <&PIO19 6 ALT5 BIDIR_PU BYPASS 0>; + sd_dat3 = <&PIO19 7 ALT5 BIDIR_PU BYPASS 0>; + sd_led = <&PIO16 6 ALT6 OUT>; + sd_pwren = <&PIO16 7 ALT6 OUT>; + sd_cd = <&PIO19 0 ALT6 IN>; + sd_wp = <&PIO19 1 ALT6 IN>; + }; + }; + }; + + + i2c0 { + pinctrl_i2c0_default: i2c0-default { + st,pins { + sda = <&PIO10 6 ALT2 BIDIR>; + scl = <&PIO10 5 ALT2 BIDIR>; + }; + }; + }; + + i2c1 { + pinctrl_i2c1_default: i2c1-default { + st,pins { + sda = <&PIO11 1 ALT2 BIDIR>; + scl = <&PIO11 0 ALT2 BIDIR>; + }; + }; + }; + + i2c2 { + pinctrl_i2c2_default: i2c2-default { + st,pins { + sda = <&PIO15 6 ALT2 BIDIR>; + scl = <&PIO15 5 ALT2 BIDIR>; + }; + }; + }; + + i2c3 { + pinctrl_i2c3_default: i2c3-default { + st,pins { + sda = <&PIO18 6 ALT1 BIDIR>; + scl = <&PIO18 5 ALT1 BIDIR>; + }; + }; + }; + + spi0 { + pinctrl_spi0_default: spi0-default { + st,pins { + mtsr = <&PIO12 6 ALT2 BIDIR>; + mrst = <&PIO12 7 ALT2 BIDIR>; + scl = <&PIO12 5 ALT2 BIDIR>; + }; + }; + }; + }; + + pin-controller-front1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0921f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09210000 0x10000>; + + PIO20: PIO@09210000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO20"; + }; + }; + + pin-controller-rear { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-rear-pinctrl"; + st,syscfg = <&syscfg_rear>; + reg = <0x0922f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09220000 0x6000>; + + PIO30: gpio@09220000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO30"; + }; + PIO31: gpio@09221000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO31"; + }; + PIO32: gpio@09222000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO32"; + }; + PIO33: gpio@09223000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO33"; + }; + PIO34: gpio@09224000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO34"; + }; + PIO35: gpio@09225000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO35"; + }; + + i2c4 { + pinctrl_i2c4_default: i2c4-default { + st,pins { + sda = <&PIO30 1 ALT1 BIDIR>; + scl = <&PIO30 0 ALT1 BIDIR>; + }; + }; + }; + + i2c5 { + pinctrl_i2c5_default: i2c5-default { + st,pins { + sda = <&PIO34 4 ALT1 BIDIR>; + scl = <&PIO34 3 ALT1 BIDIR>; + }; + }; + }; + + usb3 { + pinctrl_usb3: usb3-2 { + st,pins { + usb-oc-detect = <&PIO35 4 ALT1 IN>; + usb-pwr-enable = <&PIO35 5 ALT1 OUT>; + usb-vbus-valid = <&PIO35 6 ALT1 IN>; + }; + }; + }; + + pwm0 { + pinctrl_pwm0_chan0_default: pwm0-0-default { + st,pins { + pwm-out = <&PIO31 1 ALT1 OUT>; + }; + }; + }; + }; + + pin-controller-flash { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-flash-pinctrl"; + st,syscfg = <&syscfg_flash>; + reg = <0x0923f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09230000 0x3000>; + + PIO40: gpio@09230000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0 0x100>; + st,bank-name = "PIO40"; + }; + PIO41: gpio@09231000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO41"; + }; + PIO42: gpio@09232000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO42"; + }; + + mmc0 { + pinctrl_mmc0: mmc0-0 { + st,pins { + emmc_clk = <&PIO40 6 ALT1 BIDIR>; + emmc_cmd = <&PIO40 7 ALT1 BIDIR_PU>; + emmc_d0 = <&PIO41 0 ALT1 BIDIR_PU>; + emmc_d1 = <&PIO41 1 ALT1 BIDIR_PU>; + emmc_d2 = <&PIO41 2 ALT1 BIDIR_PU>; + emmc_d3 = <&PIO41 3 ALT1 BIDIR_PU>; + emmc_d4 = <&PIO41 4 ALT1 BIDIR_PU>; + emmc_d5 = <&PIO41 5 ALT1 BIDIR_PU>; + emmc_d6 = <&PIO41 6 ALT1 BIDIR_PU>; + emmc_d7 = <&PIO41 7 ALT1 BIDIR_PU>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi new file mode 100644 index 0000000..b14a377 --- /dev/null +++ b/arch/arm/boot/dts/stih407.dtsi @@ -0,0 +1,263 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih407-clock.dtsi" +#include "stih407-pinctrl.dtsi" +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + intc: interrupt-controller@08761000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x08761000 0x1000>, <0x08760100 0x100>; + }; + + scu@08760000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x08760000 0x1000>; + }; + + timer@08760200 { + interrupt-parent = <&intc>; + compatible = "arm,cortex-a9-global-timer"; + reg = <0x08760200 0x100>; + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&arm_periph_clk>; + }; + + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0x08762000 0x1000>; + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + cache-unified; + cache-level = <2>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + compatible = "simple-bus"; + + syscfg_sbc: sbc-syscfg@9620000 { + compatible = "st,stih407-sbc-syscfg", "syscon"; + reg = <0x9620000 0x1000>; + }; + + syscfg_front: front-syscfg@9280000 { + compatible = "st,stih407-front-syscfg", "syscon"; + reg = <0x9280000 0x1000>; + }; + + syscfg_rear: rear-syscfg@9290000 { + compatible = "st,stih407-rear-syscfg", "syscon"; + reg = <0x9290000 0x1000>; + }; + + syscfg_flash: flash-syscfg@92a0000 { + compatible = "st,stih407-flash-syscfg", "syscon"; + reg = <0x92a0000 0x1000>; + }; + + syscfg_sbc_reg: fvdp-lite-syscfg@9600000 { + compatible = "st,stih407-sbc-reg-syscfg", "syscon"; + reg = <0x9600000 0x1000>; + }; + + syscfg_core: core-syscfg@92b0000 { + compatible = "st,stih407-core-syscfg", "syscon"; + reg = <0x92b0000 0x1000>; + }; + + syscfg_lpm: lpm-syscfg@94b5100 { + compatible = "st,stih407-lpm-syscfg", "syscon"; + reg = <0x94b5100 0x1000>; + }; + + serial@9830000 { + compatible = "st,asc"; + reg = <0x9830000 0x2c>; + interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial0>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + serial@9831000 { + compatible = "st,asc"; + reg = <0x9831000 0x2c>; + interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial1>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + serial@9832000 { + compatible = "st,asc"; + reg = <0x9832000 0x2c>; + interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial2>; + clocks = <&CLK_EXT2F_A9>; + + status = "disabled"; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0: serial@9530000 { + compatible = "st,asc"; + reg = <0x9530000 0x2c>; + interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial0>; + clocks = <&CLK_SYSIN>; + + status = "disabled"; + }; + + serial@9531000 { + compatible = "st,asc"; + reg = <0x9531000 0x2c>; + interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial1>; + clocks = <&CLK_SYSIN>; + + status = "disabled"; + }; + + i2c@9840000 { + compatible = "st,comms-ssc4-i2c"; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x9840000 0x110>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + + status = "disabled"; + }; + + i2c@9841000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9841000 0x110>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + + status = "disabled"; + }; + + i2c@9842000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9842000 0x110>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_default>; + + status = "disabled"; + }; + + i2c@9843000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9843000 0x110>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_default>; + + status = "disabled"; + }; + + i2c@9844000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9844000 0x110>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_default>; + + status = "disabled"; + }; + + i2c@9845000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9845000 0x110>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_EXT2F_A9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5_default>; + + status = "disabled"; + }; + + + /* SSCs on SBC */ + i2c@9540000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9540000 0x110>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c10_default>; + + status = "disabled"; + }; + + i2c@9541000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9541000 0x110>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c11_default>; + + status = "disabled"; + }; + }; +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 12:17 ` Lee Jones -1 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:17 UTC (permalink / raw) To: linux-arm-kernel > The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration > and 1.5-GHz ARM Cortex-A9 SMP CPU. > > Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Acked-by: Lee Jones <lee.jones@linaro.org> > Acked-by: Patrice Chotard <patrice.chotard@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ > arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ > arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ > 3 files changed, 918 insertions(+) > create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi > create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/stih407.dtsi > > diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi > new file mode 100644 > index 0000000..ae8068c > --- /dev/null > +++ b/arch/arm/boot/dts/stih407-clock.dtsi > @@ -0,0 +1,40 @@ > +/* > + * Copyright (C) 2014 STMicroelectronics R&D Limited > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > +/ { > + clocks { > + /* > + * Fixed 30MHz oscillator inputs to SoC > + */ > + CLK_SYSIN: CLK_SYSIN { I thought we weren't using upper case clk names anymore? > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <30000000>; > + clock-output-names = "CLK_SYSIN"; > + }; > + > + /* > + * ARM Peripheral clock for timers > + */ > + arm_periph_clk: arm_periph_clk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <600000000>; > + }; > + > + /* > + * Bootloader initialized system infrastructure clock for > + * serial devices. > + */ > + CLK_EXT2F_A9: clockgenC0 at 13 { Or camel? [...] -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support @ 2014-05-20 12:17 ` Lee Jones 0 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:17 UTC (permalink / raw) To: Maxime COQUELIN Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel > The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration > and 1.5-GHz ARM Cortex-A9 SMP CPU. > > Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Acked-by: Lee Jones <lee.jones@linaro.org> > Acked-by: Patrice Chotard <patrice.chotard@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ > arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ > arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ > 3 files changed, 918 insertions(+) > create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi > create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi > create mode 100644 arch/arm/boot/dts/stih407.dtsi > > diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi > new file mode 100644 > index 0000000..ae8068c > --- /dev/null > +++ b/arch/arm/boot/dts/stih407-clock.dtsi > @@ -0,0 +1,40 @@ > +/* > + * Copyright (C) 2014 STMicroelectronics R&D Limited > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > +/ { > + clocks { > + /* > + * Fixed 30MHz oscillator inputs to SoC > + */ > + CLK_SYSIN: CLK_SYSIN { I thought we weren't using upper case clk names anymore? > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <30000000>; > + clock-output-names = "CLK_SYSIN"; > + }; > + > + /* > + * ARM Peripheral clock for timers > + */ > + arm_periph_clk: arm_periph_clk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <600000000>; > + }; > + > + /* > + * Bootloader initialized system infrastructure clock for > + * serial devices. > + */ > + CLK_EXT2F_A9: clockgenC0@13 { Or camel? [...] -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support 2014-05-20 12:17 ` Lee Jones (?) @ 2014-05-20 13:08 ` Maxime Coquelin -1 siblings, 0 replies; 22+ messages in thread From: Maxime Coquelin @ 2014-05-20 13:08 UTC (permalink / raw) To: linux-arm-kernel On 05/20/2014 02:17 PM, Lee Jones wrote: >> The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration >> and 1.5-GHz ARM Cortex-A9 SMP CPU. >> >> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Acked-by: Lee Jones <lee.jones@linaro.org> >> Acked-by: Patrice Chotard <patrice.chotard@st.com> >> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> >> --- >> arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ >> arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ >> 3 files changed, 918 insertions(+) >> create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi >> create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi >> create mode 100644 arch/arm/boot/dts/stih407.dtsi >> >> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi >> new file mode 100644 >> index 0000000..ae8068c >> --- /dev/null >> +++ b/arch/arm/boot/dts/stih407-clock.dtsi >> @@ -0,0 +1,40 @@ >> +/* >> + * Copyright (C) 2014 STMicroelectronics R&D Limited >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> +/ { >> + clocks { >> + /* >> + * Fixed 30MHz oscillator inputs to SoC >> + */ >> + CLK_SYSIN: CLK_SYSIN { > > I thought we weren't using upper case clk names anymore? > >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <30000000>; >> + clock-output-names = "CLK_SYSIN"; >> + }; >> + >> + /* >> + * ARM Peripheral clock for timers >> + */ >> + arm_periph_clk: arm_periph_clk { >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <600000000>; >> + }; >> + >> + /* >> + * Bootloader initialized system infrastructure clock for >> + * serial devices. >> + */ >> + CLK_EXT2F_A9: clockgenC0 at 13 { > > Or camel? Good catch, v7 is in the pipe. Thanks, Maxime > > [...] > ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support @ 2014-05-20 13:08 ` Maxime Coquelin 0 siblings, 0 replies; 22+ messages in thread From: Maxime Coquelin @ 2014-05-20 13:08 UTC (permalink / raw) To: Lee Jones Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel On 05/20/2014 02:17 PM, Lee Jones wrote: >> The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration >> and 1.5-GHz ARM Cortex-A9 SMP CPU. >> >> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Acked-by: Lee Jones <lee.jones@linaro.org> >> Acked-by: Patrice Chotard <patrice.chotard@st.com> >> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> >> --- >> arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ >> arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ >> 3 files changed, 918 insertions(+) >> create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi >> create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi >> create mode 100644 arch/arm/boot/dts/stih407.dtsi >> >> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi >> new file mode 100644 >> index 0000000..ae8068c >> --- /dev/null >> +++ b/arch/arm/boot/dts/stih407-clock.dtsi >> @@ -0,0 +1,40 @@ >> +/* >> + * Copyright (C) 2014 STMicroelectronics R&D Limited >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> +/ { >> + clocks { >> + /* >> + * Fixed 30MHz oscillator inputs to SoC >> + */ >> + CLK_SYSIN: CLK_SYSIN { > > I thought we weren't using upper case clk names anymore? > >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <30000000>; >> + clock-output-names = "CLK_SYSIN"; >> + }; >> + >> + /* >> + * ARM Peripheral clock for timers >> + */ >> + arm_periph_clk: arm_periph_clk { >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <600000000>; >> + }; >> + >> + /* >> + * Bootloader initialized system infrastructure clock for >> + * serial devices. >> + */ >> + CLK_EXT2F_A9: clockgenC0@13 { > > Or camel? Good catch, v7 is in the pipe. Thanks, Maxime > > [...] > ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support @ 2014-05-20 13:08 ` Maxime Coquelin 0 siblings, 0 replies; 22+ messages in thread From: Maxime Coquelin @ 2014-05-20 13:08 UTC (permalink / raw) To: Lee Jones Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel On 05/20/2014 02:17 PM, Lee Jones wrote: >> The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration >> and 1.5-GHz ARM Cortex-A9 SMP CPU. >> >> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Acked-by: Lee Jones <lee.jones@linaro.org> >> Acked-by: Patrice Chotard <patrice.chotard@st.com> >> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> >> --- >> arch/arm/boot/dts/stih407-clock.dtsi | 40 +++ >> arch/arm/boot/dts/stih407-pinctrl.dtsi | 615 +++++++++++++++++++++++++++++++++ >> arch/arm/boot/dts/stih407.dtsi | 263 ++++++++++++++ >> 3 files changed, 918 insertions(+) >> create mode 100644 arch/arm/boot/dts/stih407-clock.dtsi >> create mode 100644 arch/arm/boot/dts/stih407-pinctrl.dtsi >> create mode 100644 arch/arm/boot/dts/stih407.dtsi >> >> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi >> new file mode 100644 >> index 0000000..ae8068c >> --- /dev/null >> +++ b/arch/arm/boot/dts/stih407-clock.dtsi >> @@ -0,0 +1,40 @@ >> +/* >> + * Copyright (C) 2014 STMicroelectronics R&D Limited >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> +/ { >> + clocks { >> + /* >> + * Fixed 30MHz oscillator inputs to SoC >> + */ >> + CLK_SYSIN: CLK_SYSIN { > > I thought we weren't using upper case clk names anymore? > >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <30000000>; >> + clock-output-names = "CLK_SYSIN"; >> + }; >> + >> + /* >> + * ARM Peripheral clock for timers >> + */ >> + arm_periph_clk: arm_periph_clk { >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <600000000>; >> + }; >> + >> + /* >> + * Bootloader initialized system infrastructure clock for >> + * serial devices. >> + */ >> + CLK_EXT2F_A9: clockgenC0@13 { > > Or camel? Good catch, v7 is in the pipe. Thanks, Maxime > > [...] > ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v6 4/4] ARM: dts: STiH407: Add B2120 board support 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 9:46 ` Maxime COQUELIN -1 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: linux-arm-kernel B2120 HDK is the reference board for STiH407 SoC. It has the following characteristics: - 1GB DDR3 - 8GB eMMC / SD-Card slot - 32MB NOR Flash - 1 x Gbit Ethernet - 1 x USB 3.0 port - 1 x Mini-PCIe - 1 x SATA - 1 x HDMI output - 1 x HDMI input - 1 x SPDIF This patch only introduces basic functionnalities, such as I2C and UART. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/stih407-b2120.dts | 78 +++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/stih407-b2120.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6fa1343..19322a1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -335,7 +335,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb -dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \ +dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ + stih415-b2000.dtb \ stih415-b2020.dtb \ stih416-b2000.dtb \ stih416-b2020.dtb diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts new file mode 100644 index 0000000..be82beb --- /dev/null +++ b/arch/arm/boot/dts/stih407-b2120.dts @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014 STMicroelectronics (R&D) Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +#include "stih407.dtsi" +/ { + model = "STiH407 B2120"; + compatible = "st,stih407-b2120", "st,stih407"; + + chosen { + bootargs = "console=ttyAS0,115200"; + linux,stdout-path = &sbc_serial0; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + aliases { + ttyAS0 = &sbc_serial0; + }; + + soc { + sbc_serial0: serial at 9530000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + red { + #gpio-cells = <2>; + label = "Front Panel LED"; + gpios = <&PIO4 1 0>; + linux,default-trigger = "heartbeat"; + }; + green { + #gpio-cells = <2>; + gpios = <&PIO1 3 0>; + default-state = "off"; + }; + }; + + i2c at 9842000 { + status = "okay"; + }; + + i2c at 9843000 { + status = "okay"; + }; + + i2c at 9844000 { + status = "okay"; + }; + + i2c at 9845000 { + status = "okay"; + }; + + i2c at 9540000 { + status = "okay"; + }; + + /* SSC11 to HDMI */ + i2c at 9541000 { + status = "okay"; + /* HDMI V1.3a supports Standard mode only */ + clock-frequency = <100000>; + st,i2c-min-scl-pulse-width-us = <0>; + st,i2c-min-sda-pulse-width-us = <5>; + }; + }; +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 4/4] ARM: dts: STiH407: Add B2120 board support @ 2014-05-20 9:46 ` Maxime COQUELIN 0 siblings, 0 replies; 22+ messages in thread From: Maxime COQUELIN @ 2014-05-20 9:46 UTC (permalink / raw) To: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, Maxime Coquelin, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel Cc: lee.jones B2120 HDK is the reference board for STiH407 SoC. It has the following characteristics: - 1GB DDR3 - 8GB eMMC / SD-Card slot - 32MB NOR Flash - 1 x Gbit Ethernet - 1 x USB 3.0 port - 1 x Mini-PCIe - 1 x SATA - 1 x HDMI output - 1 x HDMI input - 1 x SPDIF This patch only introduces basic functionnalities, such as I2C and UART. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/stih407-b2120.dts | 78 +++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/stih407-b2120.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6fa1343..19322a1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -335,7 +335,8 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb -dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \ +dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ + stih415-b2000.dtb \ stih415-b2020.dtb \ stih416-b2000.dtb \ stih416-b2020.dtb diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts new file mode 100644 index 0000000..be82beb --- /dev/null +++ b/arch/arm/boot/dts/stih407-b2120.dts @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014 STMicroelectronics (R&D) Limited. + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +#include "stih407.dtsi" +/ { + model = "STiH407 B2120"; + compatible = "st,stih407-b2120", "st,stih407"; + + chosen { + bootargs = "console=ttyAS0,115200"; + linux,stdout-path = &sbc_serial0; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + aliases { + ttyAS0 = &sbc_serial0; + }; + + soc { + sbc_serial0: serial@9530000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + red { + #gpio-cells = <2>; + label = "Front Panel LED"; + gpios = <&PIO4 1 0>; + linux,default-trigger = "heartbeat"; + }; + green { + #gpio-cells = <2>; + gpios = <&PIO1 3 0>; + default-state = "off"; + }; + }; + + i2c@9842000 { + status = "okay"; + }; + + i2c@9843000 { + status = "okay"; + }; + + i2c@9844000 { + status = "okay"; + }; + + i2c@9845000 { + status = "okay"; + }; + + i2c@9540000 { + status = "okay"; + }; + + /* SSC11 to HDMI */ + i2c@9541000 { + status = "okay"; + /* HDMI V1.3a supports Standard mode only */ + clock-frequency = <100000>; + st,i2c-min-scl-pulse-width-us = <0>; + st,i2c-min-sda-pulse-width-us = <5>; + }; + }; +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v6 4/4] ARM: dts: STiH407: Add B2120 board support 2014-05-20 9:46 ` Maxime COQUELIN @ 2014-05-20 12:20 ` Lee Jones -1 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:20 UTC (permalink / raw) To: linux-arm-kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > B2120 HDK is the reference board for STiH407 SoC. > It has the following characteristics: > - 1GB DDR3 > - 8GB eMMC / SD-Card slot > - 32MB NOR Flash > - 1 x Gbit Ethernet > - 1 x USB 3.0 port > - 1 x Mini-PCIe > - 1 x SATA > - 1 x HDMI output > - 1 x HDMI input > - 1 x SPDIF > > This patch only introduces basic functionnalities, such as I2C and UART. > > Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Acked-by: Lee Jones <lee.jones@linaro.org> > Acked-by: Patrice Chotard <patrice.chotard@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/Makefile | 3 +- > arch/arm/boot/dts/stih407-b2120.dts | 78 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 80 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/stih407-b2120.dts Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v6 4/4] ARM: dts: STiH407: Add B2120 board support @ 2014-05-20 12:20 ` Lee Jones 0 siblings, 0 replies; 22+ messages in thread From: Lee Jones @ 2014-05-20 12:20 UTC (permalink / raw) To: Maxime COQUELIN Cc: Olof Johansson, Rob Landley, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, Russell King, Srinivas Kandagatla, Linus Walleij, Giuseppe Cavallaro, linux-doc, linux-kernel, devicetree, linux-arm-kernel, kernel On Tue, 20 May 2014, Maxime COQUELIN wrote: > B2120 HDK is the reference board for STiH407 SoC. > It has the following characteristics: > - 1GB DDR3 > - 8GB eMMC / SD-Card slot > - 32MB NOR Flash > - 1 x Gbit Ethernet > - 1 x USB 3.0 port > - 1 x Mini-PCIe > - 1 x SATA > - 1 x HDMI output > - 1 x HDMI input > - 1 x SPDIF > > This patch only introduces basic functionnalities, such as I2C and UART. > > Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Acked-by: Lee Jones <lee.jones@linaro.org> > Acked-by: Patrice Chotard <patrice.chotard@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > --- > arch/arm/boot/dts/Makefile | 3 +- > arch/arm/boot/dts/stih407-b2120.dts | 78 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 80 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/stih407-b2120.dts Acked-by: Lee Jones <lee.jones@linaro.org> -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2014-05-20 13:09 UTC | newest] Thread overview: 22+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-05-20 9:46 [PATCH v6 0/4] Add STiH407 SoC and reference board support Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 9:46 ` [PATCH v6 1/4] ARM: dts: Sort STi boards in Makefile Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 12:19 ` Lee Jones 2014-05-20 12:19 ` Lee Jones 2014-05-20 9:46 ` [PATCH v6 2/4] ARM: dts: Fix STi boards compatibles Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 12:18 ` Lee Jones 2014-05-20 12:18 ` Lee Jones 2014-05-20 9:46 ` [PATCH v6 3/4] ARM: dts: Add STiH407 SoC support Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 12:17 ` Lee Jones 2014-05-20 12:17 ` Lee Jones 2014-05-20 13:08 ` Maxime Coquelin 2014-05-20 13:08 ` Maxime Coquelin 2014-05-20 13:08 ` Maxime Coquelin 2014-05-20 9:46 ` [PATCH v6 4/4] ARM: dts: STiH407: Add B2120 board support Maxime COQUELIN 2014-05-20 9:46 ` Maxime COQUELIN 2014-05-20 12:20 ` Lee Jones 2014-05-20 12:20 ` Lee Jones
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.