From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: Add flush_cache_vmap call in __early_set_fixmap
Date: Mon, 16 Jun 2014 15:12:42 +0100 [thread overview]
Message-ID: <20140616141242.GJ16758@arm.com> (raw)
In-Reply-To: <20140609132429.GF4179@bivouac.eciton.net>
On Mon, Jun 09, 2014 at 02:24:29PM +0100, Leif Lindholm wrote:
> On Mon, Jun 09, 2014 at 12:03:56PM +0100, Catalin Marinas wrote:
> > So I'm proposing an alternative patch (which needs some benchmarking as
> > well to see if anything is affected, maybe application startup time).
I don't like the proposed patch at all -- keeping the dsb out of set_pte is
worthwhile if we can manage it. That said, it would be interesting to know
how often we get a subsequent page fault after mapping invalid -> valid
because of the missing dsb. It could be that the cost of the benign fault is
hitting us more than we think.
> I'm happy for any fix which can be included in 3.16.
>
> But is the dsb(ishst) sufficient? We need to also prevent reads from
> overtaking the set_pte(). i.e.:
>
> ptr = early_ioremap(phys_addr, size);
> if (ptr && strcmp(ptr, "magic") == 0)
> ...
>
> Does it not require a dsb(ish)?
I don't think so. Crudely, the sequence above would look like:
STR x0, [PTEP]
DSB ISHST
LDR x0, [MAGIC]
The DSB can't complete until the STR is globally observed within the
inner-shareable domain, so the LDR cannot execute until the page table
update is visible to the walker.
If it was a DMB, we'd have a problem. Interestingly, the asm-generic
page table allocators (e.g. __pmd_alloc) *do* use dmb for ordering
observability of page-table updates via smp_wmb. I'm struggling to decide
whether that's broken or not.
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>,
"msalter@redhat.com" <msalter@redhat.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"steve.capper@linaro.org" <steve.capper@linaro.org>
Subject: Re: [PATCH] arm64: Add flush_cache_vmap call in __early_set_fixmap
Date: Mon, 16 Jun 2014 15:12:42 +0100 [thread overview]
Message-ID: <20140616141242.GJ16758@arm.com> (raw)
In-Reply-To: <20140609132429.GF4179@bivouac.eciton.net>
On Mon, Jun 09, 2014 at 02:24:29PM +0100, Leif Lindholm wrote:
> On Mon, Jun 09, 2014 at 12:03:56PM +0100, Catalin Marinas wrote:
> > So I'm proposing an alternative patch (which needs some benchmarking as
> > well to see if anything is affected, maybe application startup time).
I don't like the proposed patch at all -- keeping the dsb out of set_pte is
worthwhile if we can manage it. That said, it would be interesting to know
how often we get a subsequent page fault after mapping invalid -> valid
because of the missing dsb. It could be that the cost of the benign fault is
hitting us more than we think.
> I'm happy for any fix which can be included in 3.16.
>
> But is the dsb(ishst) sufficient? We need to also prevent reads from
> overtaking the set_pte(). i.e.:
>
> ptr = early_ioremap(phys_addr, size);
> if (ptr && strcmp(ptr, "magic") == 0)
> ...
>
> Does it not require a dsb(ish)?
I don't think so. Crudely, the sequence above would look like:
STR x0, [PTEP]
DSB ISHST
LDR x0, [MAGIC]
The DSB can't complete until the STR is globally observed within the
inner-shareable domain, so the LDR cannot execute until the page table
update is visible to the walker.
If it was a DMB, we'd have a problem. Interestingly, the asm-generic
page table allocators (e.g. __pmd_alloc) *do* use dmb for ordering
observability of page-table updates via smp_wmb. I'm struggling to decide
whether that's broken or not.
Will
next prev parent reply other threads:[~2014-06-16 14:12 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-06 10:29 [PATCH] arm64: Add flush_cache_vmap call in __early_set_fixmap Leif Lindholm
2014-06-06 10:29 ` Leif Lindholm
2014-06-06 14:37 ` Mark Salter
2014-06-06 14:37 ` Mark Salter
2014-06-06 14:53 ` Leif Lindholm
2014-06-06 14:53 ` Leif Lindholm
2014-06-06 15:09 ` Mark Salter
2014-06-06 15:09 ` Mark Salter
2014-06-09 11:03 ` Catalin Marinas
2014-06-09 11:03 ` Catalin Marinas
2014-06-09 13:24 ` Leif Lindholm
2014-06-09 13:24 ` Leif Lindholm
2014-06-09 13:38 ` Catalin Marinas
2014-06-09 13:38 ` Catalin Marinas
2014-06-09 16:40 ` Steve Capper
2014-06-09 16:40 ` Steve Capper
2014-06-10 10:39 ` Catalin Marinas
2014-06-10 10:39 ` Catalin Marinas
2014-06-16 14:17 ` Will Deacon
2014-06-16 14:17 ` Will Deacon
2014-06-16 14:12 ` Will Deacon [this message]
2014-06-16 14:12 ` Will Deacon
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