From: Thierry Reding <thierry.reding@gmail.com>
To: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
linux-pwm@vger.kernel.org, linux-doc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCHv5 2/2] pwm: sunxi: document OF bindings
Date: Wed, 18 Jun 2014 01:29:00 +0200 [thread overview]
Message-ID: <20140617232859.GC25525@mithrandir> (raw)
In-Reply-To: <1400523003-27082-3-git-send-email-alexandre.belloni@free-electrons.com>
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On Mon, May 19, 2014 at 08:10:03PM +0200, Alexandre Belloni wrote:
> This is the documentation for the Allwinner Socs PWM bindings.
"SoCs".
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt b/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt
[...]
> +Allwinner PWM controller
"Allwinner SoC"?
> +
> +Required properties:
> + - compatible: should be one of:
> + - "allwinner,sun4i-a10-pwm"
> + - "allwinner,sun7i-a20-pwm"
> + - reg: physical base address and length of the controller's registers
> + - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
> + the cells format.
> + - clocks: from common clock binding, handle to the parent clock.
This is a sentence, so should start with a capital letter.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 2/2] pwm: sunxi: document OF bindings
Date: Wed, 18 Jun 2014 01:29:00 +0200 [thread overview]
Message-ID: <20140617232859.GC25525@mithrandir> (raw)
In-Reply-To: <1400523003-27082-3-git-send-email-alexandre.belloni@free-electrons.com>
On Mon, May 19, 2014 at 08:10:03PM +0200, Alexandre Belloni wrote:
> This is the documentation for the Allwinner Socs PWM bindings.
"SoCs".
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt b/Documentation/devicetree/bindings/pwm/pwm-sunxi.txt
[...]
> +Allwinner PWM controller
"Allwinner SoC"?
> +
> +Required properties:
> + - compatible: should be one of:
> + - "allwinner,sun4i-a10-pwm"
> + - "allwinner,sun7i-a20-pwm"
> + - reg: physical base address and length of the controller's registers
> + - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
> + the cells format.
> + - clocks: from common clock binding, handle to the parent clock.
This is a sentence, so should start with a capital letter.
Thierry
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next prev parent reply other threads:[~2014-06-17 23:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 18:10 [PATCHv5 0/2] Add Allwinner SoCs PWM support Alexandre Belloni
2014-05-19 18:10 ` Alexandre Belloni
2014-05-19 18:10 ` [PATCHv5 1/2] pwm: Add Allwinner SoC support Alexandre Belloni
2014-05-19 18:10 ` Alexandre Belloni
2014-06-17 23:26 ` Thierry Reding
2014-06-17 23:26 ` Thierry Reding
2014-06-23 17:01 ` Alexandre Belloni
2014-06-23 17:01 ` Alexandre Belloni
2014-08-17 17:03 ` jonsmirl
2014-08-17 17:03 ` jonsmirl at gmail.com
2014-08-17 20:20 ` jonsmirl-Re5JQEeQqe8AvxtiuMwx3w
2014-08-17 20:20 ` jonsmirl
2014-08-17 20:20 ` jonsmirl at gmail.com
2014-05-19 18:10 ` [PATCHv5 2/2] pwm: sunxi: document OF bindings Alexandre Belloni
2014-05-19 18:10 ` Alexandre Belloni
2014-06-17 23:29 ` Thierry Reding [this message]
2014-06-17 23:29 ` Thierry Reding
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