From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>,
benh@au1.ibm.com, linuxppc-dev@lists.ozlabs.org,
bhelgaas@google.com, linux-pci@vger.kernel.org,
yan@linux.vnet.ibm.com, qiudayu@linux.vnet.ibm.com
Subject: Re: [RFC PATCH V3 07/17] ppc/pnv: Add function to deconfig a PE
Date: Mon, 23 Jun 2014 17:07:18 +0800 [thread overview]
Message-ID: <20140623090718.GA7669@richard> (raw)
In-Reply-To: <20140623052721.GB7223@shangw>
On Mon, Jun 23, 2014 at 03:27:21PM +1000, Gavin Shan wrote:
>On Tue, Jun 10, 2014 at 09:56:29AM +0800, Wei Yang wrote:
>>On PowerNV platform, it will support dynamic PE allocation and deallocation.
>>
>>This patch adds a function to release those resources related to a PE.
>>
>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>---
>> arch/powerpc/platforms/powernv/pci-ioda.c | 77 +++++++++++++++++++++++++++++
>> 1 file changed, 77 insertions(+)
>>
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 8ca3926..87cb3089 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -330,6 +330,83 @@ static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
>> }
>> #endif /* CONFIG_PCI_MSI */
>>
>>+static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>>+{
>
>Richard, it seems that the deconfiguration is incomplete. Something seems
>missed: DMA, IO and MMIO, MSI. If I understand correctly, pnv_ioda_deconfigure_pe()
>won't tear down DMA, IO and MMIO, MSI properly. For MSI/MSIx, it wouldn't
>be a problem as the VF driver should disable them before calling this function.
>
Hmm... the deconfiguration function is the counterpart of the configuration
function, so it will release the resource which are allocated in
configuration. The DMA, IO/MMIO, MSI is not assigned in the configuration
function, so it would not proper to release those resources by this function.
>>+ struct pci_dev *parent;
>>+ uint8_t bcomp, dcomp, fcomp;
>>+ int64_t rc;
>>+ long rid_end, rid;
>
>Blank line needed here to separate variable declaration and logic. And I think
>we won't run into case "if (pe->pbus)" for now. So it's worthy to have some
>comments to explain it for a bit :-)
Ok.
>
>>+ if (pe->pbus) {
>>+ int count;
>>+
>>+ dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
>>+ parent = pe->pbus->self;
>>+ if (pe->flags & PNV_IODA_PE_BUS_ALL)
>>+ count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1;
>>+ else
>>+ count = 1;
>>+
>>+ switch(count) {
>>+ case 1: bcomp = OpalPciBusAll; break;
>>+ case 2: bcomp = OpalPciBus7Bits; break;
>>+ case 4: bcomp = OpalPciBus6Bits; break;
>>+ case 8: bcomp = OpalPciBus5Bits; break;
>>+ case 16: bcomp = OpalPciBus4Bits; break;
>>+ case 32: bcomp = OpalPciBus3Bits; break;
>>+ default:
>>+ pr_err("%s: Number of subordinate busses %d"
>>+ " unsupported\n",
>>+ pci_name(pe->pbus->self), count);
>
>I guess it's not safe to do "pci_name(pe->pbus->self)" root root bus.
>
Ok, so there is a bug in the original code, will fix this.
>>+ /* Do an exact match only */
>>+ bcomp = OpalPciBusAll;
>>+ }
>>+ rid_end = pe->rid + (count << 8);
>>+ }else {
>
> } else {
>
>>+ parent = pe->pdev->bus->self;
>>+ bcomp = OpalPciBusAll;
>>+ dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_COMPARE_RID_FUNCTION_NUMBER;
>>+ rid_end = pe->rid + 1;
>>+ }
>>+
>>+ /* Disable MVT on IODA1 */
>>+ if (phb->type == PNV_PHB_IODA1) {
>>+ rc = opal_pci_set_mve_enable(phb->opal_id,
>>+ pe->mve_number, OPAL_DISABLE_MVE);
>>+ if (rc) {
>>+ pe_err(pe, "OPAL error %ld enabling MVE %d\n",
>>+ rc, pe->mve_number);
>>+ pe->mve_number = -1;
>>+ }
>>+ }
>>+ /* Clear the reverse map */
>>+ for (rid = pe->rid; rid < rid_end; rid++)
>>+ phb->ioda.pe_rmap[rid] = 0;
>>+
>>+ /* Release from all parents PELT-V */
>>+ while (parent) {
>>+ struct pci_dn *pdn = pci_get_pdn(parent);
>>+ if (pdn && pdn->pe_number != IODA_INVALID_PE) {
>>+ rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
>>+ pe->pe_number, OPAL_REMOVE_PE_FROM_DOMAIN);
>>+ /* XXX What to do in case of error ? */
>>+ }
>>+ parent = parent->bus->self;
>>+ }
>
>It seems that you missed removing the PE from its own PELTV, which was
>introduced by commit 631ad69 ("powerpc/powernv: Add PE to its own PELTV").
>
Sounds correct, this is missed.
>>+
>>+ /* Dissociate PE in PELT */
>>+ rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid,
>>+ bcomp, dcomp, fcomp, OPAL_UNMAP_PE);
>>+ if (rc)
>>+ pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc);
>>+
>>+ pe->pbus = NULL;
>>+ pe->pdev = NULL;
>>+
>>+ return 0;
>>+}
>>+
>> static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> {
>> struct pci_dev *parent;
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
WARNING: multiple messages have this Message-ID (diff)
From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>,
benh@au1.ibm.com, linux-pci@vger.kernel.org,
yan@linux.vnet.ibm.com, bhelgaas@google.com,
qiudayu@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: Re: [RFC PATCH V3 07/17] ppc/pnv: Add function to deconfig a PE
Date: Mon, 23 Jun 2014 17:07:18 +0800 [thread overview]
Message-ID: <20140623090718.GA7669@richard> (raw)
In-Reply-To: <20140623052721.GB7223@shangw>
On Mon, Jun 23, 2014 at 03:27:21PM +1000, Gavin Shan wrote:
>On Tue, Jun 10, 2014 at 09:56:29AM +0800, Wei Yang wrote:
>>On PowerNV platform, it will support dynamic PE allocation and deallocation.
>>
>>This patch adds a function to release those resources related to a PE.
>>
>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>---
>> arch/powerpc/platforms/powernv/pci-ioda.c | 77 +++++++++++++++++++++++++++++
>> 1 file changed, 77 insertions(+)
>>
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 8ca3926..87cb3089 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -330,6 +330,83 @@ static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
>> }
>> #endif /* CONFIG_PCI_MSI */
>>
>>+static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>>+{
>
>Richard, it seems that the deconfiguration is incomplete. Something seems
>missed: DMA, IO and MMIO, MSI. If I understand correctly, pnv_ioda_deconfigure_pe()
>won't tear down DMA, IO and MMIO, MSI properly. For MSI/MSIx, it wouldn't
>be a problem as the VF driver should disable them before calling this function.
>
Hmm... the deconfiguration function is the counterpart of the configuration
function, so it will release the resource which are allocated in
configuration. The DMA, IO/MMIO, MSI is not assigned in the configuration
function, so it would not proper to release those resources by this function.
>>+ struct pci_dev *parent;
>>+ uint8_t bcomp, dcomp, fcomp;
>>+ int64_t rc;
>>+ long rid_end, rid;
>
>Blank line needed here to separate variable declaration and logic. And I think
>we won't run into case "if (pe->pbus)" for now. So it's worthy to have some
>comments to explain it for a bit :-)
Ok.
>
>>+ if (pe->pbus) {
>>+ int count;
>>+
>>+ dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
>>+ parent = pe->pbus->self;
>>+ if (pe->flags & PNV_IODA_PE_BUS_ALL)
>>+ count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1;
>>+ else
>>+ count = 1;
>>+
>>+ switch(count) {
>>+ case 1: bcomp = OpalPciBusAll; break;
>>+ case 2: bcomp = OpalPciBus7Bits; break;
>>+ case 4: bcomp = OpalPciBus6Bits; break;
>>+ case 8: bcomp = OpalPciBus5Bits; break;
>>+ case 16: bcomp = OpalPciBus4Bits; break;
>>+ case 32: bcomp = OpalPciBus3Bits; break;
>>+ default:
>>+ pr_err("%s: Number of subordinate busses %d"
>>+ " unsupported\n",
>>+ pci_name(pe->pbus->self), count);
>
>I guess it's not safe to do "pci_name(pe->pbus->self)" root root bus.
>
Ok, so there is a bug in the original code, will fix this.
>>+ /* Do an exact match only */
>>+ bcomp = OpalPciBusAll;
>>+ }
>>+ rid_end = pe->rid + (count << 8);
>>+ }else {
>
> } else {
>
>>+ parent = pe->pdev->bus->self;
>>+ bcomp = OpalPciBusAll;
>>+ dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_COMPARE_RID_FUNCTION_NUMBER;
>>+ rid_end = pe->rid + 1;
>>+ }
>>+
>>+ /* Disable MVT on IODA1 */
>>+ if (phb->type == PNV_PHB_IODA1) {
>>+ rc = opal_pci_set_mve_enable(phb->opal_id,
>>+ pe->mve_number, OPAL_DISABLE_MVE);
>>+ if (rc) {
>>+ pe_err(pe, "OPAL error %ld enabling MVE %d\n",
>>+ rc, pe->mve_number);
>>+ pe->mve_number = -1;
>>+ }
>>+ }
>>+ /* Clear the reverse map */
>>+ for (rid = pe->rid; rid < rid_end; rid++)
>>+ phb->ioda.pe_rmap[rid] = 0;
>>+
>>+ /* Release from all parents PELT-V */
>>+ while (parent) {
>>+ struct pci_dn *pdn = pci_get_pdn(parent);
>>+ if (pdn && pdn->pe_number != IODA_INVALID_PE) {
>>+ rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
>>+ pe->pe_number, OPAL_REMOVE_PE_FROM_DOMAIN);
>>+ /* XXX What to do in case of error ? */
>>+ }
>>+ parent = parent->bus->self;
>>+ }
>
>It seems that you missed removing the PE from its own PELTV, which was
>introduced by commit 631ad69 ("powerpc/powernv: Add PE to its own PELTV").
>
Sounds correct, this is missed.
>>+
>>+ /* Dissociate PE in PELT */
>>+ rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid,
>>+ bcomp, dcomp, fcomp, OPAL_UNMAP_PE);
>>+ if (rc)
>>+ pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc);
>>+
>>+ pe->pbus = NULL;
>>+ pe->pdev = NULL;
>>+
>>+ return 0;
>>+}
>>+
>> static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> {
>> struct pci_dev *parent;
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
next prev parent reply other threads:[~2014-06-23 9:07 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-10 1:56 [RFC PATCH V3 00/17] Enable SRIOV on POWER8 Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 01/17] pci/iov: Export interface for retrieve VF's BDF Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 02/17] pci/of: Match PCI VFs to dev-tree nodes dynamically Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 5:07 ` Gavin Shan
2014-06-23 5:07 ` Gavin Shan
2014-06-23 6:29 ` Wei Yang
2014-06-23 6:29 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 03/17] ppc/pci: don't unset pci resources for VFs Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 04/17] PCI: SRIOV: add VF enable/disable hook Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 5:03 ` Gavin Shan
2014-06-23 5:03 ` Gavin Shan
2014-06-23 6:29 ` Wei Yang
2014-06-23 6:29 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 05/17] ppc/pnv: user macro to define the TCE size Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 5:12 ` Gavin Shan
2014-06-23 5:12 ` Gavin Shan
2014-06-23 6:31 ` Wei Yang
2014-06-23 6:31 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 06/17] ppc/pnv: allocate pe->iommu_table dynamically Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-24 10:06 ` Alexey Kardashevskiy
2014-06-24 10:06 ` Alexey Kardashevskiy
2014-06-25 1:12 ` Wei Yang
2014-06-25 1:12 ` Wei Yang
2014-06-25 4:12 ` Alexey Kardashevskiy
2014-06-25 4:12 ` Alexey Kardashevskiy
2014-06-25 5:27 ` Wei Yang
2014-06-25 5:27 ` Wei Yang
2014-06-25 7:50 ` Alexey Kardashevskiy
2014-06-25 7:50 ` Alexey Kardashevskiy
2014-06-25 7:56 ` Benjamin Herrenschmidt
2014-06-25 7:56 ` Benjamin Herrenschmidt
2014-06-25 9:18 ` Wei Yang
2014-06-25 9:18 ` Wei Yang
2014-06-25 9:13 ` Wei Yang
2014-06-25 9:13 ` Wei Yang
2014-06-25 9:20 ` David Laight
2014-06-25 9:20 ` David Laight
2014-06-25 9:31 ` Wei Yang
2014-06-25 9:31 ` Wei Yang
2014-06-25 10:30 ` Alexey Kardashevskiy
2014-06-25 10:30 ` Alexey Kardashevskiy
2014-07-14 3:12 ` Benjamin Herrenschmidt
2014-06-10 1:56 ` [RFC PATCH V3 07/17] ppc/pnv: Add function to deconfig a PE Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 5:27 ` Gavin Shan
2014-06-23 5:27 ` Gavin Shan
2014-06-23 9:07 ` Wei Yang [this message]
2014-06-23 9:07 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 08/17] PCI: Add weak pcibios_sriov_resource_size() interface Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 5:41 ` Gavin Shan
2014-06-23 5:41 ` Gavin Shan
2014-06-23 7:56 ` Wei Yang
2014-06-23 7:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 09/17] PCI: Add weak pcibios_sriov_resource_alignment() interface Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 10/17] PCI: take additional IOV BAR alignment in sizing and assigning Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 11/17] ppc/pnv: Expand VF resources according to the number of total_pe Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 6:07 ` Gavin Shan
2014-06-23 6:07 ` Gavin Shan
2014-06-23 6:56 ` Wei Yang
2014-06-23 6:56 ` Wei Yang
2014-06-23 7:08 ` Gavin Shan
2014-06-23 7:08 ` Gavin Shan
2014-06-10 1:56 ` [RFC PATCH V3 12/17] powerpc/powernv: implement pcibios_sriov_resource_alignment on powernv Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-23 6:09 ` Gavin Shan
2014-06-23 6:09 ` Gavin Shan
2014-06-23 8:21 ` Wei Yang
2014-06-23 8:21 ` Wei Yang
2014-06-23 23:29 ` Gavin Shan
2014-06-23 23:29 ` Gavin Shan
2014-06-24 1:24 ` Wei Yang
2014-06-24 1:24 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 13/17] powerpc/powernv: shift VF resource with an offset Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 14/17] ppc/pci: create/release dev-tree node for VFs Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-18 18:26 ` Grant Likely
2014-06-18 20:51 ` Benjamin Herrenschmidt
2014-06-18 20:51 ` Benjamin Herrenschmidt
2014-06-19 2:46 ` Wei Yang
2014-06-19 8:30 ` Grant Likely
2014-06-19 9:42 ` Wei Yang
2014-06-20 3:46 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 15/17] powerpc/powernv: allocate VF PE Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 16/17] ppc/pci: Expanding IOV BAR, with m64_per_iov supported Wei Yang
2014-06-10 1:56 ` Wei Yang
2014-06-10 1:56 ` [RFC PATCH V3 17/17] ppc/pnv: Group VF PE when IOV BAR is big on PHB3 Wei Yang
2014-06-10 1:56 ` Wei Yang
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