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* User ptr horror show
@ 2014-06-30 18:21 Jerome Glisse
  2014-06-30 18:47 ` David Herrmann
  0 siblings, 1 reply; 5+ messages in thread
From: Jerome Glisse @ 2014-06-30 18:21 UTC (permalink / raw)
  To: dri-devel, airlied, Daniel Vetter

So in light of the radeon patch to add user ptr, i took a look at
intel code and it is time to put an end to this non sense. It
violate so many mm assumptions that it just not a doable options.

So Intel code only register a range_start callback that means that
any gup or other i915 activities that happens just after this call
back returns as no idea what so ever of it might get. It might get
the old pages that are about to change or the new pages.

For the use case where the gpu is only reading thing from those
buffer this is fine. But the use case where gpu gonna writte to
them and then user space expect to be able to access what the gpu
wrote through its userspace mapping it will be like any games in
a casino. You will never ever win in the end. You are bound to
loose. Just no way around that.

So let just stop that non sense. Wake up from our dream and move
on.

I am not even talking about how invalidate_page is ignore and how
well this will play with page write back.

Cheers,
Jérôme
The Grand Inquisitor

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2014-06-30 20:13 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-06-30 18:21 User ptr horror show Jerome Glisse
2014-06-30 18:47 ` David Herrmann
2014-06-30 19:04   ` Jerome Glisse
2014-06-30 19:25     ` David Herrmann
2014-06-30 20:13       ` Jerome Glisse

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