From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Prashant Gaikwad
<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Alexandre Courbot
<acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Sebastian Hesselbarth
<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Tuomas Tynkkynen
<ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 5/6] clk: tegra: Add support for Tegra132 CAR clocks
Date: Wed, 16 Jul 2014 09:44:10 +0200 [thread overview]
Message-ID: <20140716074410.GF7978@ulmo> (raw)
In-Reply-To: <1405437890-6468-6-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 3624 bytes --]
On Tue, Jul 15, 2014 at 06:24:35PM +0300, Peter De Schrijver wrote:
> Tegra132 CAR supports almost the same clocks as Tegra124 CAR. This patch
> deals with the small differences.
>
> --
> I'm not entirely sure why the soc_therm clock needs to be enabled on Tegra132,
> but turning it off results in a system hang. I presume this might be because
> of fastboot initializing soc_therm.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> drivers/clk/tegra/clk-tegra124.c | 32 ++++++++++++++++++++++++++++++++
> 1 files changed, 32 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
> index 80efe51..b857aab 100644
> --- a/drivers/clk/tegra/clk-tegra124.c
> +++ b/drivers/clk/tegra/clk-tegra124.c
> @@ -1369,6 +1369,7 @@ static struct tegra_clk_init_table init_table[] __initdata = {
> {TEGRA124_CLK_XUSB_HS_SRC, TEGRA124_CLK_PLL_U_60M, 60000000, 0},
> {TEGRA124_CLK_XUSB_FALCON_SRC, TEGRA124_CLK_PLL_RE_OUT, 224000000, 0},
> {TEGRA124_CLK_XUSB_HOST_SRC, TEGRA124_CLK_PLL_RE_OUT, 112000000, 0},
> + {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0},
> /* This MUST be the last entry. */
> {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
> };
> @@ -1378,9 +1379,25 @@ static void __init tegra124_clock_apply_init_table(void)
> tegra_init_from_table(init_table, clks, TEGRA124_CLK_CLK_MAX);
> }
>
> +enum {
> + TEGRA124_CLK,
> + TEGRA132_CLK,
> +};
I'd prefer this to be something like:
struct tegra_car_soc {
bool has_ccplex_clk;
};
static const struct tegra_car_soc tegra124_car_soc = {
.has_ccplex_clk = false,
};
static const struct tegra_car_soc tegra132_car_soc = {
.has_ccplex_clk = true,
};
> +static const struct of_device_id tegra_clock_of_match[] = {
> + { .compatible = "nvidia,tegra124-car", .data = (void *)TEGRA124_CLK },
.data = &tegra124_car_soc,
> + { .compatible = "nvidia,tegra132-car", .data = (void *)TEGRA132_CLK },
.data = &tegra132_car_soc,
> static void __init tegra124_clock_init(struct device_node *np)
> {
> struct device_node *node;
> + const struct of_device_id *match;
const struct tegra_car_soc *soc;
> + uintptr_t id;
> + match = of_match_node(tegra_clock_of_match, np);
> + id = (uintptr_t)match->data;
soc = match->data;
>
> clk_base = of_iomap(np, 0);
> if (!clk_base) {
> @@ -1416,6 +1433,20 @@ static void __init tegra124_clock_init(struct device_node *np)
> tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
> tegra_pmc_clk_init(pmc_base, tegra124_clks);
>
> + if (id == TEGRA132_CLK) {
if (soc->has_ccplex_clk) {
That's somewhat more explicit and avoids a lot of ugly casting.
> + int i;
> +
> + tegra124_clks[tegra_clk_cclk_g].present = false;
> + tegra124_clks[tegra_clk_cclk_lp].present = false;
> + tegra124_clks[tegra_clk_pll_x].present = false;
> + tegra124_clks[tegra_clk_pll_x_out0].present = false;
> +
> + /* Tegra132 requires the soc_therm clock to be always on */
> + for (i = 0; i < ARRAY_SIZE(init_table); i++) {
> + if (init_table[i].clk_id == TEGRA124_CLK_SOC_THERM)
> + init_table[i].state = 1;
I wonder if we could do this someplace else. If we could, then we'd have
the opportunity to make the init_table const.
> + }
> + }
> tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
Could use a blank line after the closing } above.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/6] clk: tegra: Add support for Tegra132 CAR clocks
Date: Wed, 16 Jul 2014 09:44:10 +0200 [thread overview]
Message-ID: <20140716074410.GF7978@ulmo> (raw)
In-Reply-To: <1405437890-6468-6-git-send-email-pdeschrijver@nvidia.com>
On Tue, Jul 15, 2014 at 06:24:35PM +0300, Peter De Schrijver wrote:
> Tegra132 CAR supports almost the same clocks as Tegra124 CAR. This patch
> deals with the small differences.
>
> --
> I'm not entirely sure why the soc_therm clock needs to be enabled on Tegra132,
> but turning it off results in a system hang. I presume this might be because
> of fastboot initializing soc_therm.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra124.c | 32 ++++++++++++++++++++++++++++++++
> 1 files changed, 32 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
> index 80efe51..b857aab 100644
> --- a/drivers/clk/tegra/clk-tegra124.c
> +++ b/drivers/clk/tegra/clk-tegra124.c
> @@ -1369,6 +1369,7 @@ static struct tegra_clk_init_table init_table[] __initdata = {
> {TEGRA124_CLK_XUSB_HS_SRC, TEGRA124_CLK_PLL_U_60M, 60000000, 0},
> {TEGRA124_CLK_XUSB_FALCON_SRC, TEGRA124_CLK_PLL_RE_OUT, 224000000, 0},
> {TEGRA124_CLK_XUSB_HOST_SRC, TEGRA124_CLK_PLL_RE_OUT, 112000000, 0},
> + {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0},
> /* This MUST be the last entry. */
> {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
> };
> @@ -1378,9 +1379,25 @@ static void __init tegra124_clock_apply_init_table(void)
> tegra_init_from_table(init_table, clks, TEGRA124_CLK_CLK_MAX);
> }
>
> +enum {
> + TEGRA124_CLK,
> + TEGRA132_CLK,
> +};
I'd prefer this to be something like:
struct tegra_car_soc {
bool has_ccplex_clk;
};
static const struct tegra_car_soc tegra124_car_soc = {
.has_ccplex_clk = false,
};
static const struct tegra_car_soc tegra132_car_soc = {
.has_ccplex_clk = true,
};
> +static const struct of_device_id tegra_clock_of_match[] = {
> + { .compatible = "nvidia,tegra124-car", .data = (void *)TEGRA124_CLK },
.data = &tegra124_car_soc,
> + { .compatible = "nvidia,tegra132-car", .data = (void *)TEGRA132_CLK },
.data = &tegra132_car_soc,
> static void __init tegra124_clock_init(struct device_node *np)
> {
> struct device_node *node;
> + const struct of_device_id *match;
const struct tegra_car_soc *soc;
> + uintptr_t id;
> + match = of_match_node(tegra_clock_of_match, np);
> + id = (uintptr_t)match->data;
soc = match->data;
>
> clk_base = of_iomap(np, 0);
> if (!clk_base) {
> @@ -1416,6 +1433,20 @@ static void __init tegra124_clock_init(struct device_node *np)
> tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
> tegra_pmc_clk_init(pmc_base, tegra124_clks);
>
> + if (id == TEGRA132_CLK) {
if (soc->has_ccplex_clk) {
That's somewhat more explicit and avoids a lot of ugly casting.
> + int i;
> +
> + tegra124_clks[tegra_clk_cclk_g].present = false;
> + tegra124_clks[tegra_clk_cclk_lp].present = false;
> + tegra124_clks[tegra_clk_pll_x].present = false;
> + tegra124_clks[tegra_clk_pll_x_out0].present = false;
> +
> + /* Tegra132 requires the soc_therm clock to be always on */
> + for (i = 0; i < ARRAY_SIZE(init_table); i++) {
> + if (init_table[i].clk_id == TEGRA124_CLK_SOC_THERM)
> + init_table[i].state = 1;
I wonder if we could do this someplace else. If we could, then we'd have
the opportunity to make the init_table const.
> + }
> + }
> tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
Could use a blank line after the closing } above.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Russell King <linux@arm.linux.org.uk>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Mike Turquette <mturquette@linaro.org>,
Joseph Lo <josephl@nvidia.com>,
Alexandre Courbot <acourbot@nvidia.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Tuomas Tynkkynen <ttynkkynen@nvidia.com>,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] clk: tegra: Add support for Tegra132 CAR clocks
Date: Wed, 16 Jul 2014 09:44:10 +0200 [thread overview]
Message-ID: <20140716074410.GF7978@ulmo> (raw)
In-Reply-To: <1405437890-6468-6-git-send-email-pdeschrijver@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 3595 bytes --]
On Tue, Jul 15, 2014 at 06:24:35PM +0300, Peter De Schrijver wrote:
> Tegra132 CAR supports almost the same clocks as Tegra124 CAR. This patch
> deals with the small differences.
>
> --
> I'm not entirely sure why the soc_therm clock needs to be enabled on Tegra132,
> but turning it off results in a system hang. I presume this might be because
> of fastboot initializing soc_therm.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra124.c | 32 ++++++++++++++++++++++++++++++++
> 1 files changed, 32 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
> index 80efe51..b857aab 100644
> --- a/drivers/clk/tegra/clk-tegra124.c
> +++ b/drivers/clk/tegra/clk-tegra124.c
> @@ -1369,6 +1369,7 @@ static struct tegra_clk_init_table init_table[] __initdata = {
> {TEGRA124_CLK_XUSB_HS_SRC, TEGRA124_CLK_PLL_U_60M, 60000000, 0},
> {TEGRA124_CLK_XUSB_FALCON_SRC, TEGRA124_CLK_PLL_RE_OUT, 224000000, 0},
> {TEGRA124_CLK_XUSB_HOST_SRC, TEGRA124_CLK_PLL_RE_OUT, 112000000, 0},
> + {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0},
> /* This MUST be the last entry. */
> {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
> };
> @@ -1378,9 +1379,25 @@ static void __init tegra124_clock_apply_init_table(void)
> tegra_init_from_table(init_table, clks, TEGRA124_CLK_CLK_MAX);
> }
>
> +enum {
> + TEGRA124_CLK,
> + TEGRA132_CLK,
> +};
I'd prefer this to be something like:
struct tegra_car_soc {
bool has_ccplex_clk;
};
static const struct tegra_car_soc tegra124_car_soc = {
.has_ccplex_clk = false,
};
static const struct tegra_car_soc tegra132_car_soc = {
.has_ccplex_clk = true,
};
> +static const struct of_device_id tegra_clock_of_match[] = {
> + { .compatible = "nvidia,tegra124-car", .data = (void *)TEGRA124_CLK },
.data = &tegra124_car_soc,
> + { .compatible = "nvidia,tegra132-car", .data = (void *)TEGRA132_CLK },
.data = &tegra132_car_soc,
> static void __init tegra124_clock_init(struct device_node *np)
> {
> struct device_node *node;
> + const struct of_device_id *match;
const struct tegra_car_soc *soc;
> + uintptr_t id;
> + match = of_match_node(tegra_clock_of_match, np);
> + id = (uintptr_t)match->data;
soc = match->data;
>
> clk_base = of_iomap(np, 0);
> if (!clk_base) {
> @@ -1416,6 +1433,20 @@ static void __init tegra124_clock_init(struct device_node *np)
> tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
> tegra_pmc_clk_init(pmc_base, tegra124_clks);
>
> + if (id == TEGRA132_CLK) {
if (soc->has_ccplex_clk) {
That's somewhat more explicit and avoids a lot of ugly casting.
> + int i;
> +
> + tegra124_clks[tegra_clk_cclk_g].present = false;
> + tegra124_clks[tegra_clk_cclk_lp].present = false;
> + tegra124_clks[tegra_clk_pll_x].present = false;
> + tegra124_clks[tegra_clk_pll_x_out0].present = false;
> +
> + /* Tegra132 requires the soc_therm clock to be always on */
> + for (i = 0; i < ARRAY_SIZE(init_table); i++) {
> + if (init_table[i].clk_id == TEGRA124_CLK_SOC_THERM)
> + init_table[i].state = 1;
I wonder if we could do this someplace else. If we could, then we'd have
the opportunity to make the init_table const.
> + }
> + }
> tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
Could use a blank line after the closing } above.
Thierry
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next prev parent reply other threads:[~2014-07-16 7:44 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-15 15:24 [PATCH 0/6] clock support for Tegra132 Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` [PATCH 1/6] clk: tegra: don't abort clk init on error Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-16 7:20 ` Thierry Reding
2014-07-16 7:20 ` Thierry Reding
2014-07-16 7:20 ` Thierry Reding
[not found] ` <1405437890-6468-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-22 17:16 ` Stephen Warren
2014-07-22 17:16 ` Stephen Warren
2014-07-22 17:16 ` Stephen Warren
[not found] ` <53CE9C5F.1030005-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-08-15 22:45 ` Peter De Schrijver
2014-08-15 22:45 ` Peter De Schrijver
2014-08-15 22:45 ` Peter De Schrijver
[not found] ` <1405437890-6468-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-15 15:24 ` [PATCH 2/6] clk: tegra: make tegra_clocks_apply_init_table arch_initcall Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-16 7:19 ` Thierry Reding
2014-07-16 7:19 ` Thierry Reding
2014-07-16 8:27 ` Peter De Schrijver
2014-07-16 8:27 ` Peter De Schrijver
2014-07-16 8:27 ` Peter De Schrijver
[not found] ` <20140716082740.GK23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-21 21:43 ` Stephen Warren
2014-07-21 21:43 ` Stephen Warren
2014-07-21 21:43 ` Stephen Warren
2014-07-21 21:55 ` Thierry Reding
2014-07-21 21:55 ` Thierry Reding
[not found] ` <1405437890-6468-3-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-22 17:15 ` Stephen Warren
2014-07-22 17:15 ` Stephen Warren
2014-07-22 17:15 ` Stephen Warren
2014-07-15 15:24 ` [PATCH 3/6] clk: tegra: Update binding doc Tegra132 Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
[not found] ` <1405437890-6468-4-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-16 7:25 ` Thierry Reding
2014-07-16 7:25 ` Thierry Reding
2014-07-16 7:25 ` Thierry Reding
2014-07-16 8:42 ` Peter De Schrijver
2014-07-16 8:42 ` Peter De Schrijver
2014-07-16 8:42 ` Peter De Schrijver
2014-07-15 15:24 ` [PATCH 6/6] clk: tegra: Add Tegra132 ccplex clocks Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
[not found] ` <1405437890-6468-7-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-15 20:35 ` Rhyland Klein
2014-07-15 20:35 ` Rhyland Klein
2014-07-15 20:35 ` Rhyland Klein
[not found] ` <53C5908C.5000009-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-15 20:40 ` Rhyland Klein
2014-07-15 20:40 ` Rhyland Klein
2014-07-15 20:40 ` Rhyland Klein
2014-07-16 8:30 ` Peter De Schrijver
2014-07-16 8:30 ` Peter De Schrijver
2014-07-16 8:30 ` Peter De Schrijver
2014-07-16 8:31 ` Peter De Schrijver
2014-07-16 8:31 ` Peter De Schrijver
2014-07-16 8:31 ` Peter De Schrijver
2014-07-15 15:24 ` [PATCH 4/6] clk: tegra: add nvidia,tegra132-ccplex-clk binding Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
[not found] ` <1405437890-6468-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-16 7:32 ` Thierry Reding
2014-07-16 7:32 ` Thierry Reding
2014-07-16 7:32 ` Thierry Reding
2014-07-22 17:18 ` Stephen Warren
2014-07-22 17:18 ` Stephen Warren
2014-07-22 17:18 ` Stephen Warren
2014-07-15 15:24 ` [PATCH 5/6] clk: tegra: Add support for Tegra132 CAR clocks Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
2014-07-15 15:24 ` Peter De Schrijver
[not found] ` <1405437890-6468-6-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-07-16 7:44 ` Thierry Reding [this message]
2014-07-16 7:44 ` Thierry Reding
2014-07-16 7:44 ` Thierry Reding
2014-07-16 8:41 ` Peter De Schrijver
2014-07-16 8:41 ` Peter De Schrijver
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