From: Sam Ravnborg <sam@ravnborg.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Arnd Bergmann <arnd@arndb.de>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Date: Sat, 19 Jul 2014 14:59:37 +0200 [thread overview]
Message-ID: <20140719125937.GA18566@ravnborg.org> (raw)
In-Reply-To: <20140718205953.GA21964@ravnborg.org>
From 929c64c1aaf378b767e0ed89826b6bb12449df15 Mon Sep 17 00:00:00 2001
From: Sam Ravnborg <sam@ravnborg.org>
Date: Sat, 19 Jul 2014 14:47:43 +0200
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Reoder the functions so the various functions are grouped
according to how they access memoy.
For example __raw_{read,write}* are now all grouped.
The benefit of this grouping is that one can easier find all
IO accessors of one type.
To do so a few more #ifdef CONFIG_64BIT had to be used.
Add a small boiler plate comment for some of the groups to
better let them stand out.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
Hi Thierry.
This is my attempt to bring some order into io.h
with respect to the order the functions are defined in.
In a follow-up mail I also said we should delete the _p variants
of some methods but I then learned they are for slow IO access.
So these I have left as is.
And introducing static inline for all functions that are pure macro
substitution is also left out for now.
Please consider if you will take this as a follow-on patch.
Sam
include/asm-generic/io.h | 126 +++++++++++++++++++++++++++--------------------
1 file changed, 73 insertions(+), 53 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b2ea16b..5c84db4 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -24,10 +24,10 @@
#define mmiowb() do {} while (0)
#endif
-/*****************************************************************************/
/*
- * readX/writeX() are used to access memory mapped devices. On some
- * architectures the memory mapped IO stuff needs to be accessed
+ * raw_{read,write}{b,w,l,q} access memory in native endian.
+ *
+ * On some architectures the memory mapped IO stuff needs to be accessed
* differently. On the simple architectures, we just read/write the
* memory location directly.
*/
@@ -55,25 +55,16 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
}
#endif
-#ifndef readb
-#define readb __raw_readb
-#endif
-
-#ifndef readw
-#define readw readw
-static inline u16 readw(const volatile void __iomem *addr)
+#ifdef CONFIG_64BIT
+#ifndef __raw_readq
+#define __raw_readq __raw_readq
+static inline u64 __raw_readq(const volatile void __iomem *addr)
{
- return __le16_to_cpu(__raw_readw(addr));
+ return *(const volatile u64 __force *) addr;
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef readl
-#define readl readl
-static inline u32 readl(const volatile void __iomem *addr)
-{
- return __le32_to_cpu(__raw_readl(addr));
-}
-#endif
#ifndef __raw_writeb
#define __raw_writeb __raw_writeb
@@ -99,27 +90,42 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
}
#endif
-#ifndef writeb
-#define writeb __raw_writeb
+#ifdef CONFIG_64BIT
+#ifndef __raw_writeq
+#define __raw_writeq __raw_writeq
+static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
+{
+ *(volatile u64 __force *) addr = b;
+}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef writew
-#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+
+/*
+ * {read,write}{b,w,l,q} access little endian memory
+ * and return result in native endian
+ */
+#ifndef readb
+#define readb __raw_readb
#endif
-#ifndef writel
-#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+#ifndef readw
+#define readw readw
+static inline u16 readw(const volatile void __iomem *addr)
+{
+ return __le16_to_cpu(__raw_readw(addr));
+}
#endif
-#ifdef CONFIG_64BIT
-#ifndef __raw_readq
-#define __raw_readq __raw_readq
-static inline u64 __raw_readq(const volatile void __iomem *addr)
+#ifndef readl
+#define readl readl
+static inline u32 readl(const volatile void __iomem *addr)
{
- return *(const volatile u64 __force *) addr;
+ return __le32_to_cpu(__raw_readl(addr));
}
#endif
+#ifdef CONFIG_64BIT
#ifndef readq
#define readq readq
static inline u64 readq(const volatile void __iomem *addr)
@@ -127,20 +133,31 @@ static inline u64 readq(const volatile void __iomem *addr)
return __le64_to_cpu(__raw_readq(addr));
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef __raw_writeq
-#define __raw_writeq __raw_writeq
-static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
-{
- *(volatile u64 __force *) addr = b;
-}
+
+#ifndef writeb
+#define writeb __raw_writeb
+#endif
+
+#ifndef writew
+#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+#endif
+
+#ifndef writel
+#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
#endif
+#ifdef CONFIG_64BIT
#ifndef writeq
#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
#endif
#endif /* CONFIG_64BIT */
+
+/*
+ * {read,write}s{b,w,l.q}b access native memory in chunks specified by count
+ */
#ifndef readsb
#define readsb readsb
static inline void readsb(const void __iomem *addr, void *buffer, int count)
@@ -183,6 +200,23 @@ static inline void readsl(const void __iomem *addr, void *buffer, int count)
}
#endif
+#ifdef CONFIG_64BIT
+#ifndef readsq
+#define readsq readsq
+static inline void readsq(const void __iomem *addr, void *buffer, int count)
+{
+ if (count) {
+ u64 *buf = buffer;
+ do {
+ u64 x = __raw_readq(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+
#ifndef writesb
#define writesb writesb
static inline void writesb(void __iomem *addr, const void *buffer, int count)
@@ -223,20 +257,6 @@ static inline void writesl(void __iomem *addr, const void *buffer, int count)
#endif
#ifdef CONFIG_64BIT
-#ifndef readsq
-#define readsq readsq
-static inline void readsq(const void __iomem *addr, void *buffer, int count)
-{
- if (count) {
- u64 *buf = buffer;
- do {
- u64 x = __raw_readq(addr);
- *buf++ = x;
- } while (--count);
- }
-}
-#endif
-
#ifndef writesq
#define writesq writesq
static inline void writesq(void __iomem *addr, const void *buffer, int count)
@@ -356,6 +376,10 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread16(addr) readw(addr)
#define ioread32(addr) readl(addr)
+#define iowrite8(v, addr) writeb((v), (addr))
+#define iowrite16(v, addr) writew((v), (addr))
+#define iowrite32(v, addr) writel((v), (addr))
+
#ifndef ioread16be
#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr))
#endif
@@ -364,10 +388,6 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr))
#endif
-#define iowrite8(v, addr) writeb((v), (addr))
-#define iowrite16(v, addr) writew((v), (addr))
-#define iowrite32(v, addr) writel((v), (addr))
-
#ifndef iowrite16be
#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr)
#endif
--
1.9.3
WARNING: multiple messages have this Message-ID (diff)
From: sam@ravnborg.org (Sam Ravnborg)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Date: Sat, 19 Jul 2014 14:59:37 +0200 [thread overview]
Message-ID: <20140719125937.GA18566@ravnborg.org> (raw)
In-Reply-To: <20140718205953.GA21964@ravnborg.org>
>From 929c64c1aaf378b767e0ed89826b6bb12449df15 Mon Sep 17 00:00:00 2001
From: Sam Ravnborg <sam@ravnborg.org>
Date: Sat, 19 Jul 2014 14:47:43 +0200
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Reoder the functions so the various functions are grouped
according to how they access memoy.
For example __raw_{read,write}* are now all grouped.
The benefit of this grouping is that one can easier find all
IO accessors of one type.
To do so a few more #ifdef CONFIG_64BIT had to be used.
Add a small boiler plate comment for some of the groups to
better let them stand out.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
Hi Thierry.
This is my attempt to bring some order into io.h
with respect to the order the functions are defined in.
In a follow-up mail I also said we should delete the _p variants
of some methods but I then learned they are for slow IO access.
So these I have left as is.
And introducing static inline for all functions that are pure macro
substitution is also left out for now.
Please consider if you will take this as a follow-on patch.
Sam
include/asm-generic/io.h | 126 +++++++++++++++++++++++++++--------------------
1 file changed, 73 insertions(+), 53 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b2ea16b..5c84db4 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -24,10 +24,10 @@
#define mmiowb() do {} while (0)
#endif
-/*****************************************************************************/
/*
- * readX/writeX() are used to access memory mapped devices. On some
- * architectures the memory mapped IO stuff needs to be accessed
+ * raw_{read,write}{b,w,l,q} access memory in native endian.
+ *
+ * On some architectures the memory mapped IO stuff needs to be accessed
* differently. On the simple architectures, we just read/write the
* memory location directly.
*/
@@ -55,25 +55,16 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
}
#endif
-#ifndef readb
-#define readb __raw_readb
-#endif
-
-#ifndef readw
-#define readw readw
-static inline u16 readw(const volatile void __iomem *addr)
+#ifdef CONFIG_64BIT
+#ifndef __raw_readq
+#define __raw_readq __raw_readq
+static inline u64 __raw_readq(const volatile void __iomem *addr)
{
- return __le16_to_cpu(__raw_readw(addr));
+ return *(const volatile u64 __force *) addr;
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef readl
-#define readl readl
-static inline u32 readl(const volatile void __iomem *addr)
-{
- return __le32_to_cpu(__raw_readl(addr));
-}
-#endif
#ifndef __raw_writeb
#define __raw_writeb __raw_writeb
@@ -99,27 +90,42 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
}
#endif
-#ifndef writeb
-#define writeb __raw_writeb
+#ifdef CONFIG_64BIT
+#ifndef __raw_writeq
+#define __raw_writeq __raw_writeq
+static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
+{
+ *(volatile u64 __force *) addr = b;
+}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef writew
-#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+
+/*
+ * {read,write}{b,w,l,q} access little endian memory
+ * and return result in native endian
+ */
+#ifndef readb
+#define readb __raw_readb
#endif
-#ifndef writel
-#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+#ifndef readw
+#define readw readw
+static inline u16 readw(const volatile void __iomem *addr)
+{
+ return __le16_to_cpu(__raw_readw(addr));
+}
#endif
-#ifdef CONFIG_64BIT
-#ifndef __raw_readq
-#define __raw_readq __raw_readq
-static inline u64 __raw_readq(const volatile void __iomem *addr)
+#ifndef readl
+#define readl readl
+static inline u32 readl(const volatile void __iomem *addr)
{
- return *(const volatile u64 __force *) addr;
+ return __le32_to_cpu(__raw_readl(addr));
}
#endif
+#ifdef CONFIG_64BIT
#ifndef readq
#define readq readq
static inline u64 readq(const volatile void __iomem *addr)
@@ -127,20 +133,31 @@ static inline u64 readq(const volatile void __iomem *addr)
return __le64_to_cpu(__raw_readq(addr));
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef __raw_writeq
-#define __raw_writeq __raw_writeq
-static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
-{
- *(volatile u64 __force *) addr = b;
-}
+
+#ifndef writeb
+#define writeb __raw_writeb
+#endif
+
+#ifndef writew
+#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+#endif
+
+#ifndef writel
+#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
#endif
+#ifdef CONFIG_64BIT
#ifndef writeq
#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
#endif
#endif /* CONFIG_64BIT */
+
+/*
+ * {read,write}s{b,w,l.q}b access native memory in chunks specified by count
+ */
#ifndef readsb
#define readsb readsb
static inline void readsb(const void __iomem *addr, void *buffer, int count)
@@ -183,6 +200,23 @@ static inline void readsl(const void __iomem *addr, void *buffer, int count)
}
#endif
+#ifdef CONFIG_64BIT
+#ifndef readsq
+#define readsq readsq
+static inline void readsq(const void __iomem *addr, void *buffer, int count)
+{
+ if (count) {
+ u64 *buf = buffer;
+ do {
+ u64 x = __raw_readq(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+
#ifndef writesb
#define writesb writesb
static inline void writesb(void __iomem *addr, const void *buffer, int count)
@@ -223,20 +257,6 @@ static inline void writesl(void __iomem *addr, const void *buffer, int count)
#endif
#ifdef CONFIG_64BIT
-#ifndef readsq
-#define readsq readsq
-static inline void readsq(const void __iomem *addr, void *buffer, int count)
-{
- if (count) {
- u64 *buf = buffer;
- do {
- u64 x = __raw_readq(addr);
- *buf++ = x;
- } while (--count);
- }
-}
-#endif
-
#ifndef writesq
#define writesq writesq
static inline void writesq(void __iomem *addr, const void *buffer, int count)
@@ -356,6 +376,10 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread16(addr) readw(addr)
#define ioread32(addr) readl(addr)
+#define iowrite8(v, addr) writeb((v), (addr))
+#define iowrite16(v, addr) writew((v), (addr))
+#define iowrite32(v, addr) writel((v), (addr))
+
#ifndef ioread16be
#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr))
#endif
@@ -364,10 +388,6 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr))
#endif
-#define iowrite8(v, addr) writeb((v), (addr))
-#define iowrite16(v, addr) writew((v), (addr))
-#define iowrite32(v, addr) writel((v), (addr))
-
#ifndef iowrite16be
#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr)
#endif
--
1.9.3
WARNING: multiple messages have this Message-ID (diff)
From: Sam Ravnborg <sam@ravnborg.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Arnd Bergmann <arnd@arndb.de>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Date: Sat, 19 Jul 2014 14:59:37 +0200 [thread overview]
Message-ID: <20140719125937.GA18566@ravnborg.org> (raw)
In-Reply-To: <20140718205953.GA21964@ravnborg.org>
>From 929c64c1aaf378b767e0ed89826b6bb12449df15 Mon Sep 17 00:00:00 2001
From: Sam Ravnborg <sam@ravnborg.org>
Date: Sat, 19 Jul 2014 14:47:43 +0200
Subject: [PATCH] asm-generic/io.h: reorder funtions to form logical groups
Reoder the functions so the various functions are grouped
according to how they access memoy.
For example __raw_{read,write}* are now all grouped.
The benefit of this grouping is that one can easier find all
IO accessors of one type.
To do so a few more #ifdef CONFIG_64BIT had to be used.
Add a small boiler plate comment for some of the groups to
better let them stand out.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
Hi Thierry.
This is my attempt to bring some order into io.h
with respect to the order the functions are defined in.
In a follow-up mail I also said we should delete the _p variants
of some methods but I then learned they are for slow IO access.
So these I have left as is.
And introducing static inline for all functions that are pure macro
substitution is also left out for now.
Please consider if you will take this as a follow-on patch.
Sam
include/asm-generic/io.h | 126 +++++++++++++++++++++++++++--------------------
1 file changed, 73 insertions(+), 53 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b2ea16b..5c84db4 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -24,10 +24,10 @@
#define mmiowb() do {} while (0)
#endif
-/*****************************************************************************/
/*
- * readX/writeX() are used to access memory mapped devices. On some
- * architectures the memory mapped IO stuff needs to be accessed
+ * raw_{read,write}{b,w,l,q} access memory in native endian.
+ *
+ * On some architectures the memory mapped IO stuff needs to be accessed
* differently. On the simple architectures, we just read/write the
* memory location directly.
*/
@@ -55,25 +55,16 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
}
#endif
-#ifndef readb
-#define readb __raw_readb
-#endif
-
-#ifndef readw
-#define readw readw
-static inline u16 readw(const volatile void __iomem *addr)
+#ifdef CONFIG_64BIT
+#ifndef __raw_readq
+#define __raw_readq __raw_readq
+static inline u64 __raw_readq(const volatile void __iomem *addr)
{
- return __le16_to_cpu(__raw_readw(addr));
+ return *(const volatile u64 __force *) addr;
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef readl
-#define readl readl
-static inline u32 readl(const volatile void __iomem *addr)
-{
- return __le32_to_cpu(__raw_readl(addr));
-}
-#endif
#ifndef __raw_writeb
#define __raw_writeb __raw_writeb
@@ -99,27 +90,42 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
}
#endif
-#ifndef writeb
-#define writeb __raw_writeb
+#ifdef CONFIG_64BIT
+#ifndef __raw_writeq
+#define __raw_writeq __raw_writeq
+static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
+{
+ *(volatile u64 __force *) addr = b;
+}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef writew
-#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+
+/*
+ * {read,write}{b,w,l,q} access little endian memory
+ * and return result in native endian
+ */
+#ifndef readb
+#define readb __raw_readb
#endif
-#ifndef writel
-#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
+#ifndef readw
+#define readw readw
+static inline u16 readw(const volatile void __iomem *addr)
+{
+ return __le16_to_cpu(__raw_readw(addr));
+}
#endif
-#ifdef CONFIG_64BIT
-#ifndef __raw_readq
-#define __raw_readq __raw_readq
-static inline u64 __raw_readq(const volatile void __iomem *addr)
+#ifndef readl
+#define readl readl
+static inline u32 readl(const volatile void __iomem *addr)
{
- return *(const volatile u64 __force *) addr;
+ return __le32_to_cpu(__raw_readl(addr));
}
#endif
+#ifdef CONFIG_64BIT
#ifndef readq
#define readq readq
static inline u64 readq(const volatile void __iomem *addr)
@@ -127,20 +133,31 @@ static inline u64 readq(const volatile void __iomem *addr)
return __le64_to_cpu(__raw_readq(addr));
}
#endif
+#endif /* CONFIG_64BIT */
-#ifndef __raw_writeq
-#define __raw_writeq __raw_writeq
-static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
-{
- *(volatile u64 __force *) addr = b;
-}
+
+#ifndef writeb
+#define writeb __raw_writeb
+#endif
+
+#ifndef writew
+#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
+#endif
+
+#ifndef writel
+#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
#endif
+#ifdef CONFIG_64BIT
#ifndef writeq
#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
#endif
#endif /* CONFIG_64BIT */
+
+/*
+ * {read,write}s{b,w,l.q}b access native memory in chunks specified by count
+ */
#ifndef readsb
#define readsb readsb
static inline void readsb(const void __iomem *addr, void *buffer, int count)
@@ -183,6 +200,23 @@ static inline void readsl(const void __iomem *addr, void *buffer, int count)
}
#endif
+#ifdef CONFIG_64BIT
+#ifndef readsq
+#define readsq readsq
+static inline void readsq(const void __iomem *addr, void *buffer, int count)
+{
+ if (count) {
+ u64 *buf = buffer;
+ do {
+ u64 x = __raw_readq(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+
#ifndef writesb
#define writesb writesb
static inline void writesb(void __iomem *addr, const void *buffer, int count)
@@ -223,20 +257,6 @@ static inline void writesl(void __iomem *addr, const void *buffer, int count)
#endif
#ifdef CONFIG_64BIT
-#ifndef readsq
-#define readsq readsq
-static inline void readsq(const void __iomem *addr, void *buffer, int count)
-{
- if (count) {
- u64 *buf = buffer;
- do {
- u64 x = __raw_readq(addr);
- *buf++ = x;
- } while (--count);
- }
-}
-#endif
-
#ifndef writesq
#define writesq writesq
static inline void writesq(void __iomem *addr, const void *buffer, int count)
@@ -356,6 +376,10 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread16(addr) readw(addr)
#define ioread32(addr) readl(addr)
+#define iowrite8(v, addr) writeb((v), (addr))
+#define iowrite16(v, addr) writew((v), (addr))
+#define iowrite32(v, addr) writel((v), (addr))
+
#ifndef ioread16be
#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr))
#endif
@@ -364,10 +388,6 @@ static inline void outl(u32 b, unsigned long addr)
#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr))
#endif
-#define iowrite8(v, addr) writeb((v), (addr))
-#define iowrite16(v, addr) writew((v), (addr))
-#define iowrite32(v, addr) writel((v), (addr))
-
#ifndef iowrite16be
#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr)
#endif
--
1.9.3
next prev parent reply other threads:[~2014-07-19 12:59 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-16 11:01 [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Thierry Reding
2014-07-16 11:01 ` Thierry Reding
2014-07-16 11:01 ` [PATCH v3 2/3] ARM: Use include/asm-generic/io.h Thierry Reding
2014-07-16 11:01 ` Thierry Reding
2014-07-17 12:03 ` Catalin Marinas
2014-07-17 12:03 ` Catalin Marinas
2014-07-16 11:01 ` [PATCH v3 3/3] arm64: " Thierry Reding
2014-07-16 11:01 ` Thierry Reding
2014-07-17 12:04 ` Catalin Marinas
2014-07-17 12:04 ` Catalin Marinas
2014-07-17 12:26 ` Thierry Reding
2014-07-17 12:26 ` Thierry Reding
2014-07-18 15:50 ` Catalin Marinas
2014-07-18 15:50 ` Catalin Marinas
2014-07-17 12:01 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Catalin Marinas
2014-07-17 12:01 ` Catalin Marinas
2014-07-18 20:59 ` Sam Ravnborg
2014-07-18 20:59 ` Sam Ravnborg
2014-07-18 20:59 ` Sam Ravnborg
2014-07-18 21:06 ` Sam Ravnborg
2014-07-18 21:06 ` Sam Ravnborg
2014-07-19 7:38 ` Arnd Bergmann
2014-07-19 7:38 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read, write}s*() Arnd Bergmann
2014-07-19 8:41 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Sam Ravnborg
2014-07-19 8:41 ` Sam Ravnborg
2014-07-19 9:05 ` Arnd Bergmann
2014-07-19 9:05 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read, write}s*() Arnd Bergmann
2014-07-19 9:11 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Sam Ravnborg
2014-07-19 9:11 ` Sam Ravnborg
2014-07-19 17:21 ` James Bottomley
2014-07-19 17:21 ` James Bottomley
2014-08-05 9:07 ` Geert Uytterhoeven
2014-08-05 9:07 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read, write}s*() Geert Uytterhoeven
2014-08-05 9:14 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Sam Ravnborg
2014-08-05 9:14 ` Sam Ravnborg
2014-07-19 7:44 ` Arnd Bergmann
2014-07-19 7:44 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read, write}s*() Arnd Bergmann
2014-07-19 8:53 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read,write}s*() Sam Ravnborg
2014-07-19 8:53 ` Sam Ravnborg
2014-07-19 9:10 ` Arnd Bergmann
2014-07-19 9:10 ` [PATCH v3 1/3] asm-generic/io.h: Implement generic {read, write}s*() Arnd Bergmann
2014-07-19 12:59 ` Sam Ravnborg [this message]
2014-07-19 12:59 ` [PATCH] asm-generic/io.h: reorder funtions to form logical groups Sam Ravnborg
2014-07-19 12:59 ` Sam Ravnborg
2014-08-01 14:09 ` Thierry Reding
2014-08-01 14:09 ` Thierry Reding
2014-08-01 22:42 ` Sam Ravnborg
2014-08-01 22:42 ` Sam Ravnborg
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