From: Shawn Guo <shawn.guo@linaro.org>
To: Eduardo Valentin <edubezval@gmail.com>
Cc: Anson Huang <b20788@freescale.com>,
rui.zhang@intel.com, eduardo.valentin@ti.com,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH] Thermal: imx: add i.mx6sx thermal support
Date: Wed, 6 Aug 2014 09:10:46 +0800 [thread overview]
Message-ID: <20140806011045.GC27051@dragon> (raw)
In-Reply-To: <20140805132553.GA20291@developer>
On Tue, Aug 05, 2014 at 09:25:53AM -0400, Eduardo Valentin wrote:
> > @@ -31,6 +32,10 @@
> >
> > #define MISC0 0x0150
> > #define MISC0_REFTOP_SELBIASOFF (1 << 3)
> > +#define MISC1 0x0160
> > +#define MISC1_IRQ_TEMPHIGH (1 << 29)
> > +#define MISC1_IRQ_TEMPLOW (1 << 28)
> > +#define MISC1_IRQ_TEMPPANIC (1 << 27)
>
> how about using
> +#define MISC1_IRQ_TEMPHIGH BIT(29)
> +#define MISC1_IRQ_TEMPLOW BIT(28)
> +#define MISC1_IRQ_TEMPPANIC BIT(27)
While I agree this is good, I think it's more important to keep the
style consistent for the file. We already have a number of (1 << x)
in the file.
...
> > @@ -66,6 +76,21 @@ enum imx_thermal_trip {
> > #define FACTOR1 15976
> > #define FACTOR2 4297157
> >
> > +#define TEMPMON_V1 1
> > +#define TEMPMON_V2 2
> > +
>
> where does the V1/V2 nomenclature come from? how about:
>
> +#define TEMPMON_IMX6Q 1
> +#define TEMPMON_IMX6SX 2
+1
If the V1/V2 nomenclature is not coming from hardware manual, we don't
want to use it, neither code nor binding doc.
Shawn
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawn.guo@linaro.org>
To: Eduardo Valentin <edubezval@gmail.com>
Cc: Anson Huang <b20788@freescale.com>, <rui.zhang@intel.com>,
<eduardo.valentin@ti.com>, <linux-pm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH] Thermal: imx: add i.mx6sx thermal support
Date: Wed, 6 Aug 2014 09:10:46 +0800 [thread overview]
Message-ID: <20140806011045.GC27051@dragon> (raw)
In-Reply-To: <20140805132553.GA20291@developer>
On Tue, Aug 05, 2014 at 09:25:53AM -0400, Eduardo Valentin wrote:
> > @@ -31,6 +32,10 @@
> >
> > #define MISC0 0x0150
> > #define MISC0_REFTOP_SELBIASOFF (1 << 3)
> > +#define MISC1 0x0160
> > +#define MISC1_IRQ_TEMPHIGH (1 << 29)
> > +#define MISC1_IRQ_TEMPLOW (1 << 28)
> > +#define MISC1_IRQ_TEMPPANIC (1 << 27)
>
> how about using
> +#define MISC1_IRQ_TEMPHIGH BIT(29)
> +#define MISC1_IRQ_TEMPLOW BIT(28)
> +#define MISC1_IRQ_TEMPPANIC BIT(27)
While I agree this is good, I think it's more important to keep the
style consistent for the file. We already have a number of (1 << x)
in the file.
...
> > @@ -66,6 +76,21 @@ enum imx_thermal_trip {
> > #define FACTOR1 15976
> > #define FACTOR2 4297157
> >
> > +#define TEMPMON_V1 1
> > +#define TEMPMON_V2 2
> > +
>
> where does the V1/V2 nomenclature come from? how about:
>
> +#define TEMPMON_IMX6Q 1
> +#define TEMPMON_IMX6SX 2
+1
If the V1/V2 nomenclature is not coming from hardware manual, we don't
want to use it, neither code nor binding doc.
Shawn
next prev parent reply other threads:[~2014-08-06 1:11 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-05 9:12 [PATCH] Thermal: imx: add i.mx6sx thermal support Anson Huang
2014-08-05 9:12 ` Anson Huang
2014-08-05 13:25 ` Eduardo Valentin
2014-08-06 1:10 ` Shawn Guo [this message]
2014-08-06 1:10 ` Shawn Guo
2014-08-06 2:17 ` Anson Huang
2014-08-06 2:17 ` Anson Huang
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