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From: Catalin Marinas <catalin.marinas@arm.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>,
	Yijing Wang <wangyijing@huawei.com>,
	Rob Herring <robherring2@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Will Deacon <Will.Deacon@arm.com>,
	Russell King <linux@arm.linux.org.uk>,
	linux-pci <linux-pci@vger.kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Tanmay Inamdar <tinamdar@apm.com>,
	Grant Likely <grant.likely@secretlab.ca>,
	Sinan Kaya <okaya@codeaurora.org>,
	Jingoo Han <jg1.han@samsung.com>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Suravee Suthikulanit <suravee.suthikulpanit@amd.com>,
	linux-arch <linux-arch@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	Device Tree ML <devicetree@vger.kernel.org>,
	LAKML
	<linux-arm-kernel@lists.infradead.org>"grant.likely@linaro.org"
	<grant.>
Subject: Re: [PATCH v10 07/10] OF: Introduce helper function for getting PCI domain_nr
Date: Tue, 9 Sep 2014 12:20:54 +0100	[thread overview]
Message-ID: <20140909112054.GD29639@arm.com> (raw)
In-Reply-To: <3780051.0eHpCN6UC9@wuerfel>

On Tue, Sep 09, 2014 at 10:16:04AM +0100, Arnd Bergmann wrote:
> On Tuesday 09 September 2014 09:46:21 Liviu Dudau wrote:
> > On Tue, Sep 09, 2014 at 06:54:21AM +0100, Yijing Wang wrote:
> > > >>> on new requests. This function gets called quite a lot and I'm trying not to
> > > >>> make it too heavy weight.
> > > >>
> > > >> Generally, nothing should be accessing the same DT value frequently.
> > > >> It should get cached somewhere.
> > > >>
> > > > 
> > > > The problem appears for DTs that don't have the pci-domain info. Then the cached
> > > > value is left at the default non-valid value and attempts to rescan the DT will
> > > > be made every time the function is called.
> > > > 
> > > >> I don't really understand how domains are used so it's hard to provide
> > > >> a recommendation here. Do domains even belong in the DT?
> > > > 
> > > > ACPI calls them segments and the way Bjorn explained it to me at some moment was
> > > > that it was an attempt to split up a bus in different groups (or alternatively,
> > > > merge a few busses together). To be honest I haven't seen systems where the domain
> > > > is anything other than zero, but JasonG (or maybe Benjamin) were floating an
> > > > idea of using the domain number to identify physical slots.
> > > 
> > > PCI domain(or named segment) is provided by firmware, in ACPI system, we evaluated it
> > > by method "_SEG". in IA64 with ACPI, PCI hostbridge driver retrieves the domain from ACPI,
> > > if it's absent, the default domain is zero. So I wonder why in DTS, if it's absent, we get
> > > a auto increment domain value.
> > 
> > Because you can have more than one hostbridge (rare, but not impossible) and unless you
> > want to join the two segments, you might want to give it a different domain.
> 
> I think you misunderstood the question. The difference is that in ACPI you
> are required to specify the domain, while in DT it is optional with your
> implementation.
> 
> I think in general it would be nice if we could mandate that in DT you also
> have to always provide a domain number, however the problem is that we can't
> change the existing DTB files that people are using that do not specify a
> domain.
> 
> We could possibly make this an architecture specific setting though and
> mandate that all ARM64 platforms have to set it, while ARM32 does not need
> it.

We can assume that if a domain is not specified and there is a single
top level PCIe node, the domain defaults to 0. Are there any arm32
platforms that require multiple domains (and do not specify a number in
the DT)?

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>,
	Yijing Wang <wangyijing@huawei.com>,
	Rob Herring <robherring2@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Will Deacon <Will.Deacon@arm.com>,
	Russell King <linux@arm.linux.org.uk>,
	linux-pci <linux-pci@vger.kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Tanmay Inamdar <tinamdar@apm.com>,
	Grant Likely <grant.likely@secretlab.ca>,
	Sinan Kaya <okaya@codeaurora.org>,
	Jingoo Han <jg1.han@samsung.com>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Suravee Suthikulanit <suravee.suthikulpanit@amd.com>,
	linux-arch <linux-arch@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	Device Tree ML <devicetree@vger.kernel.org>,
	LAKML <linux-arm-kernel@lists.infradead.org>,
	"grant.likely@linaro.org" <grant.likely@linaro.org>
Subject: Re: [PATCH v10 07/10] OF: Introduce helper function for getting PCI domain_nr
Date: Tue, 9 Sep 2014 12:20:54 +0100	[thread overview]
Message-ID: <20140909112054.GD29639@arm.com> (raw)
Message-ID: <20140909112054.p7zXvoeK02__JRkYgiiYAPwYT5pi-JkJMyjo9KUIBeY@z> (raw)
In-Reply-To: <3780051.0eHpCN6UC9@wuerfel>

On Tue, Sep 09, 2014 at 10:16:04AM +0100, Arnd Bergmann wrote:
> On Tuesday 09 September 2014 09:46:21 Liviu Dudau wrote:
> > On Tue, Sep 09, 2014 at 06:54:21AM +0100, Yijing Wang wrote:
> > > >>> on new requests. This function gets called quite a lot and I'm trying not to
> > > >>> make it too heavy weight.
> > > >>
> > > >> Generally, nothing should be accessing the same DT value frequently.
> > > >> It should get cached somewhere.
> > > >>
> > > > 
> > > > The problem appears for DTs that don't have the pci-domain info. Then the cached
> > > > value is left at the default non-valid value and attempts to rescan the DT will
> > > > be made every time the function is called.
> > > > 
> > > >> I don't really understand how domains are used so it's hard to provide
> > > >> a recommendation here. Do domains even belong in the DT?
> > > > 
> > > > ACPI calls them segments and the way Bjorn explained it to me at some moment was
> > > > that it was an attempt to split up a bus in different groups (or alternatively,
> > > > merge a few busses together). To be honest I haven't seen systems where the domain
> > > > is anything other than zero, but JasonG (or maybe Benjamin) were floating an
> > > > idea of using the domain number to identify physical slots.
> > > 
> > > PCI domain(or named segment) is provided by firmware, in ACPI system, we evaluated it
> > > by method "_SEG". in IA64 with ACPI, PCI hostbridge driver retrieves the domain from ACPI,
> > > if it's absent, the default domain is zero. So I wonder why in DTS, if it's absent, we get
> > > a auto increment domain value.
> > 
> > Because you can have more than one hostbridge (rare, but not impossible) and unless you
> > want to join the two segments, you might want to give it a different domain.
> 
> I think you misunderstood the question. The difference is that in ACPI you
> are required to specify the domain, while in DT it is optional with your
> implementation.
> 
> I think in general it would be nice if we could mandate that in DT you also
> have to always provide a domain number, however the problem is that we can't
> change the existing DTB files that people are using that do not specify a
> domain.
> 
> We could possibly make this an architecture specific setting though and
> mandate that all ARM64 platforms have to set it, while ARM32 does not need
> it.

We can assume that if a domain is not specified and there is a single
top level PCIe node, the domain defaults to 0. Are there any arm32
platforms that require multiple domains (and do not specify a number in
the DT)?

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 07/10] OF: Introduce helper function for getting PCI domain_nr
Date: Tue, 9 Sep 2014 12:20:54 +0100	[thread overview]
Message-ID: <20140909112054.GD29639@arm.com> (raw)
In-Reply-To: <3780051.0eHpCN6UC9@wuerfel>

On Tue, Sep 09, 2014 at 10:16:04AM +0100, Arnd Bergmann wrote:
> On Tuesday 09 September 2014 09:46:21 Liviu Dudau wrote:
> > On Tue, Sep 09, 2014 at 06:54:21AM +0100, Yijing Wang wrote:
> > > >>> on new requests. This function gets called quite a lot and I'm trying not to
> > > >>> make it too heavy weight.
> > > >>
> > > >> Generally, nothing should be accessing the same DT value frequently.
> > > >> It should get cached somewhere.
> > > >>
> > > > 
> > > > The problem appears for DTs that don't have the pci-domain info. Then the cached
> > > > value is left at the default non-valid value and attempts to rescan the DT will
> > > > be made every time the function is called.
> > > > 
> > > >> I don't really understand how domains are used so it's hard to provide
> > > >> a recommendation here. Do domains even belong in the DT?
> > > > 
> > > > ACPI calls them segments and the way Bjorn explained it to me at some moment was
> > > > that it was an attempt to split up a bus in different groups (or alternatively,
> > > > merge a few busses together). To be honest I haven't seen systems where the domain
> > > > is anything other than zero, but JasonG (or maybe Benjamin) were floating an
> > > > idea of using the domain number to identify physical slots.
> > > 
> > > PCI domain(or named segment) is provided by firmware, in ACPI system, we evaluated it
> > > by method "_SEG". in IA64 with ACPI, PCI hostbridge driver retrieves the domain from ACPI,
> > > if it's absent, the default domain is zero. So I wonder why in DTS, if it's absent, we get
> > > a auto increment domain value.
> > 
> > Because you can have more than one hostbridge (rare, but not impossible) and unless you
> > want to join the two segments, you might want to give it a different domain.
> 
> I think you misunderstood the question. The difference is that in ACPI you
> are required to specify the domain, while in DT it is optional with your
> implementation.
> 
> I think in general it would be nice if we could mandate that in DT you also
> have to always provide a domain number, however the problem is that we can't
> change the existing DTB files that people are using that do not specify a
> domain.
> 
> We could possibly make this an architecture specific setting though and
> mandate that all ARM64 platforms have to set it, while ARM32 does not need
> it.

We can assume that if a domain is not specified and there is a single
top level PCIe node, the domain defaults to 0. Are there any arm32
platforms that require multiple domains (and do not specify a number in
the DT)?

-- 
Catalin

  reply	other threads:[~2014-09-09 11:20 UTC|newest]

Thread overview: 121+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-08 13:54 [PATCH v10 00/10] Support for creating generic PCI host bridges from DT Liviu Dudau
2014-09-08 13:54 ` Liviu Dudau
2014-09-08 13:54 ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 01/10] Fix ioport_map() for !CONFIG_GENERIC_IOMAP cases Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 02/10] PCI: Introduce helper functions to deal with PCI I/O ranges Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 03/10] ARM: Define PCI_IOBASE as the base of virtual PCI IO space Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 04/10] PCI: OF: Fix the conversion of IO ranges into IO resources Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 05/10] PCI: Create pci_host_bridge before its associated bus in pci_create_root_bus Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 06/10] PCI: Introduce generic domain handling for PCI busses Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 14:03   ` Catalin Marinas
2014-09-08 14:03     ` Catalin Marinas
2014-09-08 14:05     ` Liviu Dudau
2014-09-08 14:05       ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 07/10] OF: Introduce helper function for getting PCI domain_nr Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 14:27   ` Rob Herring
2014-09-08 14:27     ` Rob Herring
2014-09-08 14:54     ` Liviu Dudau
2014-09-08 14:54       ` Liviu Dudau
2014-09-08 15:27       ` Rob Herring
2014-09-08 15:27         ` Rob Herring
2014-09-08 15:59         ` Liviu Dudau
2014-09-08 15:59           ` Liviu Dudau
2014-09-08 16:39           ` Jason Gunthorpe
2014-09-08 16:39             ` Jason Gunthorpe
2014-09-09  5:54           ` Yijing Wang
2014-09-09  5:54             ` Yijing Wang
2014-09-09  8:46             ` Liviu Dudau
2014-09-09  8:46               ` Liviu Dudau
2014-09-09  8:46               ` Liviu Dudau
     [not found]               ` <20140909084621.GS27864-2JSQmVVBSi7ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-09-09  9:16                 ` Arnd Bergmann
2014-09-09  9:16                   ` Arnd Bergmann
2014-09-09  9:16                   ` Arnd Bergmann
2014-09-09 11:20                   ` Catalin Marinas [this message]
2014-09-09 11:20                     ` Catalin Marinas
2014-09-09 11:20                     ` Catalin Marinas
2014-09-10 18:19                     ` Arnd Bergmann
2014-09-10 18:19                       ` Arnd Bergmann
2014-09-10 18:19                       ` Arnd Bergmann
2014-09-11 14:11                       ` Phil Edworthy
2014-09-11 14:11                         ` Phil Edworthy
2014-09-11 14:49                         ` Arnd Bergmann
2014-09-11 14:49                           ` Arnd Bergmann
2014-09-11 14:49                           ` Arnd Bergmann
2014-09-09 14:17                   ` Bjorn Helgaas
2014-09-09 14:17                     ` Bjorn Helgaas
2014-09-09 14:17                     ` Bjorn Helgaas
2014-09-09  9:30               ` Yijing Wang
2014-09-09  9:30                 ` Yijing Wang
2014-09-09  9:30                 ` Yijing Wang
2014-09-09 14:11                 ` Liviu Dudau
2014-09-09 14:11                   ` Liviu Dudau
2014-09-09 14:11                   ` Liviu Dudau
2014-09-10  1:44                   ` Yijing Wang
2014-09-10  1:44                     ` Yijing Wang
2014-09-10  1:44                     ` Yijing Wang
2014-09-09 14:26                 ` Bjorn Helgaas
2014-09-09 14:26                   ` Bjorn Helgaas
2014-09-09 14:26                   ` Bjorn Helgaas
2014-09-09 15:41                   ` Jason Gunthorpe
2014-09-09 15:41                     ` Jason Gunthorpe
2014-09-09 15:41                     ` Jason Gunthorpe
2014-09-10  2:44                     ` Rob Herring
2014-09-10  2:44                       ` Rob Herring
2014-09-10  2:44                       ` Rob Herring
2014-09-10 16:32                       ` Jason Gunthorpe
2014-09-10 16:32                         ` Jason Gunthorpe
2014-09-10 16:32                         ` Jason Gunthorpe
2014-09-10 19:36                         ` Rob Herring
2014-09-10  1:55                   ` Yijing Wang
2014-09-10  1:55                     ` Yijing Wang
2014-09-10  1:55                     ` Yijing Wang
2014-09-10 13:04           ` Liviu Dudau
2014-09-10 13:04             ` Liviu Dudau
2014-09-10 13:04             ` Liviu Dudau
2014-09-10 13:04             ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 08/10] OF: PCI: Add support for parsing PCI host bridge resources from DT Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-09 13:35   ` Lorenzo Pieralisi
2014-09-09 13:35     ` Lorenzo Pieralisi
2014-09-10 14:22     ` Liviu Dudau
2014-09-10 14:22       ` Liviu Dudau
2014-09-10 15:10       ` Lorenzo Pieralisi
2014-09-10 15:10         ` Lorenzo Pieralisi
2014-09-10 15:32         ` Liviu Dudau
2014-09-10 15:32           ` Liviu Dudau
2014-09-10 16:37           ` Lorenzo Pieralisi
2014-09-10 16:37             ` Lorenzo Pieralisi
     [not found]             ` <20140910163746.GB19662-7AyDDHkRsp3ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2014-09-10 16:53               ` Liviu Dudau
2014-09-10 16:53                 ` Liviu Dudau
2014-09-10 16:53                 ` Liviu Dudau
2014-09-10 17:06                 ` Lorenzo Pieralisi
2014-09-10 17:06                   ` Lorenzo Pieralisi
2014-09-08 13:54 ` [PATCH v10 09/10] PCI: Assign unassigned bus resources in pci_scan_root_bus() Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-12 10:13   ` Suravee Suthikulpanit
2014-09-12 10:13     ` Suravee Suthikulpanit
2014-09-12 10:34     ` Liviu Dudau
2014-09-12 10:34       ` Liviu Dudau
2014-09-08 13:54 ` [PATCH v10 10/10] PCI: Introduce pci_remap_iospace() for remapping PCI I/O bus resources into CPU space Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
2014-09-08 13:54   ` Liviu Dudau
     [not found] ` <1410184472-17630-1-git-send-email-Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
2014-09-08 16:07   ` [PATCH v10 00/10] Support for creating generic PCI host bridges from DT Liviu Dudau
2014-09-08 16:07     ` Liviu Dudau
2014-09-08 16:07     ` Liviu Dudau
2014-09-12  8:25 ` Suravee Suthikulpanit
2014-09-12  8:25   ` Suravee Suthikulpanit
2014-09-12  9:30   ` Liviu Dudau
2014-09-12  9:30     ` Liviu Dudau
2014-09-12 10:00     ` Suravee Suthikulpanit
2014-09-12 10:00       ` Suravee Suthikulpanit

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