From: Bjorn Helgaas <bhelgaas@google.com>
To: Minghuan Lian <Minghuan.Lian@freescale.com>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Zang Roy-R61911 <r61911@freescale.com>,
Hu Mingkai-B21284 <B21284@freescale.com>,
Scott Wood <scottwood@freescale.com>,
Yoder Stuart-B08248 <stuart.yoder@freescale.com>,
Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH] PCI: designware: Fix configuration base address
Date: Wed, 24 Sep 2014 07:25:51 -0600 [thread overview]
Message-ID: <20140924132551.GA13850@google.com> (raw)
In-Reply-To: <1411482540-31297-1-git-send-email-Minghuan.Lian@freescale.com>
On Tue, Sep 23, 2014 at 10:28:56PM +0800, Minghuan Lian wrote:
> The code has calculated cfg0_base and cfg1_base when parsing 'reg'
> or 'ranges' property of PCI DTS node. so remove duplicate calculation.
> And when using 'reg', resource cfg is not used, the removed code
> will get incorrect configuration base.
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Applied to pci/host-designware with Mohit's ack for v3.18, thanks!
> ---
> drivers/pci/host/pcie-designware.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index c28ca05..0f3cb2a 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -515,7 +515,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> pp->mem_base = pp->mem.start;
>
> if (!pp->va_cfg0_base) {
> - pp->cfg0_base = pp->cfg.start;
> pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
> pp->cfg0_size);
> if (!pp->va_cfg0_base) {
> @@ -525,7 +524,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> }
>
> if (!pp->va_cfg1_base) {
> - pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
> pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
> pp->cfg1_size);
> if (!pp->va_cfg1_base) {
> --
> 1.9.1
>
WARNING: multiple messages have this Message-ID (diff)
From: bhelgaas@google.com (Bjorn Helgaas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] PCI: designware: Fix configuration base address
Date: Wed, 24 Sep 2014 07:25:51 -0600 [thread overview]
Message-ID: <20140924132551.GA13850@google.com> (raw)
In-Reply-To: <1411482540-31297-1-git-send-email-Minghuan.Lian@freescale.com>
On Tue, Sep 23, 2014 at 10:28:56PM +0800, Minghuan Lian wrote:
> The code has calculated cfg0_base and cfg1_base when parsing 'reg'
> or 'ranges' property of PCI DTS node. so remove duplicate calculation.
> And when using 'reg', resource cfg is not used, the removed code
> will get incorrect configuration base.
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Applied to pci/host-designware with Mohit's ack for v3.18, thanks!
> ---
> drivers/pci/host/pcie-designware.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index c28ca05..0f3cb2a 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -515,7 +515,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> pp->mem_base = pp->mem.start;
>
> if (!pp->va_cfg0_base) {
> - pp->cfg0_base = pp->cfg.start;
> pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
> pp->cfg0_size);
> if (!pp->va_cfg0_base) {
> @@ -525,7 +524,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
> }
>
> if (!pp->va_cfg1_base) {
> - pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
> pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
> pp->cfg1_size);
> if (!pp->va_cfg1_base) {
> --
> 1.9.1
>
next prev parent reply other threads:[~2014-09-24 13:25 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-23 14:28 [PATCH] PCI: designware: Fix configuration base address Minghuan Lian
2014-09-23 14:28 ` Minghuan Lian
2014-09-23 14:28 ` [PATCH] PCI: designware: Fix IO resource end address calculation Minghuan Lian
2014-09-23 14:28 ` Minghuan Lian
2014-09-23 22:53 ` Bjorn Helgaas
2014-09-23 22:53 ` Bjorn Helgaas
2014-09-24 4:14 ` Mohit KUMAR DCG
2014-09-24 4:14 ` Mohit KUMAR DCG
2014-09-24 13:26 ` Bjorn Helgaas
2014-09-24 13:26 ` Bjorn Helgaas
2014-09-23 14:28 ` [PATCH v3 1/3] PCI: designware: Rename get_msi_data to get_msi_addr Minghuan Lian
2014-09-23 14:28 ` Minghuan Lian
2014-09-23 22:45 ` Bjorn Helgaas
2014-09-23 22:45 ` Bjorn Helgaas
2014-09-24 4:12 ` Mohit KUMAR DCG
2014-09-24 4:12 ` Mohit KUMAR DCG
2014-09-24 13:27 ` Bjorn Helgaas
2014-09-24 13:27 ` Bjorn Helgaas
2014-09-23 14:28 ` [PATCH v3 2/3] PCI: designware: Add get_msi_data() to pcie_host_ops Minghuan Lian
2014-09-23 14:28 ` Minghuan Lian
2014-09-23 23:14 ` Bjorn Helgaas
2014-09-23 23:14 ` Bjorn Helgaas
2014-09-24 4:22 ` Mohit KUMAR DCG
2014-09-24 4:22 ` Mohit KUMAR DCG
2014-09-23 14:29 ` [PATCH v3 3/3] PCI: Layerscape: Add Layerscape PCIe driver Minghuan Lian
2014-09-23 14:29 ` Minghuan Lian
2014-09-23 21:25 ` Scott Wood
2014-09-23 21:25 ` Scott Wood
2014-09-24 2:17 ` Lian Minghuan-B31939
2014-09-24 2:17 ` Lian Minghuan-B31939
2014-09-23 22:53 ` [PATCH] PCI: designware: Fix configuration base address Bjorn Helgaas
2014-09-23 22:53 ` Bjorn Helgaas
2014-09-24 4:14 ` Mohit KUMAR DCG
2014-09-24 4:14 ` Mohit KUMAR DCG
2014-09-24 13:25 ` Bjorn Helgaas [this message]
2014-09-24 13:25 ` Bjorn Helgaas
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