Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
> On 25 September 2014 23:55, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > On Thu, Sep 25, 2014 at 07:47:16PM +0100, Peter Maydell wrote:
> >> > +    /* In NS EL1, HCR controlled routing to EL2 has priority over SMD.  */
> >> > +    if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
> >> > +        env->exception.syndrome = syndrome;
> >> > +        raise_exception(env, EXCP_SMC);
> >>
> >> Shouldn't this just be returning so that the generated
> >> code immediately following can raise the SMC exception
> >> with the correct syndrome, PC and singlestep state?
> >> (would also save you passing in the syndrome argument
> >> to this fn).
> >
> > When routing SMCs to EL2, the exception happens before advancing the
> > PC. It's similar to the undef cases for HVC (and SMC).
> 
> Oh, yes, that's the trap enable bit. In that case we shouldn't
> be using EXCP_SMC: this isn't routing the SMC exception, it's
> taking a Hyp trap exception, and in AArch32 the vector
> entry point is different. (Granted, you can't get to AArch32
> by taking an exception from AArch64, but we should use the
> right EXCP_ value to avoid the code looking gratuitously
> different for the two cases.)

I see. I hadn't thought much about the AArch32 case here. For
AArch64, the pseudo code referes to this as route_to_el2.
Anyway, your comment makes sense to avoid diff between a32/a64
and I think it actually makes the AArch64 code a bit cleaner
aswell.

I'll add EXCP_HYP_TRAP.

Thanks,
Edgar