From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Rob Herring" <rob.herring@linaro.org>,
"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
"Fabian Aggeler" <aggelerf@ethz.ch>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Alexander Graf" <agraf@suse.de>,
"Greg Bellows" <greg.bellows@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v6 07/10] target-arm: A64: Emulate the HVC insn
Date: Fri, 26 Sep 2014 09:06:08 +1000 [thread overview]
Message-ID: <20140925230608.GV16081@toto> (raw)
In-Reply-To: <CAFEAcA_+wdtSGUqxg9uun3s0un3qOqftPwsUU_ZX-M_nW-=yOQ@mail.gmail.com>
On Fri, Sep 26, 2014 at 12:01:11AM +0100, Peter Maydell wrote:
> On 25 September 2014 23:20, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > On Thu, Sep 25, 2014 at 07:39:32PM +0100, Peter Maydell wrote:
> >> HCR.TGE isn't actually relevant for some exceptions
> >> (eg SMC), and the HVC handling you have below
> >> effectively ends up ignoring the route_to_el2
> >> information. That suggests to me that you should put
> >> this code in a default: case in the switch below.
> >
> > I don't really test nor support TGE so I'll just drop the TGE part.
>
> I'd rather we just implemented it properly...
IMO, It's not about implementing it properly. It's about implementing the
EL3/2 support incrementally. The spec is too big to add all the features
at once.
Cheers,
Edgar
next prev parent reply other threads:[~2014-09-25 23:11 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-13 4:29 [Qemu-devel] [PATCH v6 00/10] target-arm: Parts of the AArch64 EL2/3 exception model Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 01/10] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 02/10] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-09-17 15:49 ` Greg Bellows
2014-09-25 18:15 ` Peter Maydell
2014-09-25 19:49 ` Greg Bellows
2014-09-25 19:53 ` Peter Maydell
2014-09-25 20:00 ` Greg Bellows
2014-09-25 22:12 ` Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 03/10] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 04/10] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 05/10] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 06/10] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 07/10] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-09-17 21:47 ` Greg Bellows
2014-09-25 18:39 ` Peter Maydell
2014-09-25 22:20 ` Edgar E. Iglesias
2014-09-25 23:01 ` Peter Maydell
2014-09-25 23:06 ` Edgar E. Iglesias [this message]
2014-09-25 23:19 ` Peter Maydell
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-09-17 22:43 ` Greg Bellows
2014-09-25 18:47 ` Peter Maydell
2014-09-25 22:55 ` Edgar E. Iglesias
2014-09-25 23:17 ` Peter Maydell
2014-09-25 23:31 ` Edgar E. Iglesias
2014-09-25 23:43 ` Peter Maydell
2014-09-25 23:45 ` Edgar E. Iglesias
2014-09-26 8:20 ` Edgar E. Iglesias
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 09/10] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-09-25 19:14 ` Peter Maydell
2014-09-13 4:29 ` [Qemu-devel] [PATCH v6 10/10] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-09-25 19:36 ` Peter Maydell
2014-09-25 23:03 ` Edgar E. Iglesias
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