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From: shawn.guo@freescale.com (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv4 4/6] dt-bindings: arm: add Freescale LS1021A SoC device tree binding
Date: Fri, 26 Sep 2014 14:18:52 +0800	[thread overview]
Message-ID: <20140926061851.GE31948@dragon> (raw)
In-Reply-To: <1411371952-5618-5-git-send-email-jingchang.lu@freescale.com>

On Mon, Sep 22, 2014 at 03:45:50PM +0800, Jingchang Lu wrote:
> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
> ---
>  Documentation/devicetree/bindings/arm/fsl.txt | 38 +++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
> index e935d7d..2e0ba09 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.txt
> +++ b/Documentation/devicetree/bindings/arm/fsl.txt
> @@ -74,3 +74,41 @@ Required root node properties:
>  i.MX6q generic board
>  Required root node properties:
>      - compatible = "fsl,imx6q";
> +
> +
> +Freescale LS1021A Platform Device Tree Bindings
> +------------------------------------------------
> +
> +Required root node compatible properties:
> +  - compatible = "fsl,ls1021a";
> +
> +Freescale LS1021A SoC-specific Device Tree Bindings
> +-------------------------------------------
> +
> +Freescale SCFG
> +  scfg is the supplemental configuration unit, that provides SoC specific

s/scfg/SCFG

> +configuration and status registers for the chip. Such as getting PEX port
> +status.
> +  Required properties:
> +  - compatible: should be "fsl,ls1021a-scfg"
> +  - reg: should contain base address and length of SCFG memory-mapped registers
> +
> +Example:
> +	scfg: scfg at 1570000 {
> +		compatible = "fsl,ls1021a-scfg";
> +		reg = <0x0 0x1570000 0x0 0x10000>;
> +	};
> +
> +Freescale DCFG
> +  dcfg is the device configuration unit, that provides general purpose

s/dcfg/DCFG

Shawn

> +configuration and status for the device. Such as setting the secondary
> +core start address and release the secondary core from holdoff and startup.
> +  Required properties:
> +  - compatible: should be "fsl,ls1021a-dcfg"
> +  - reg : should contain base address and length of DCFG memory-mapped registers
> +
> +Example:
> +	dcfg: dcfg at 1ee0000 {
> +		compatible = "fsl,ls1021a-dcfg";
> +		reg = <0x0 0x1ee0000 0x0 0x10000>;
> +	};
> -- 
> 1.8.0
> 

WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawn.guo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: arnd-r2nGTMty4D4@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCHv4 4/6] dt-bindings: arm: add Freescale LS1021A SoC device tree binding
Date: Fri, 26 Sep 2014 14:18:52 +0800	[thread overview]
Message-ID: <20140926061851.GE31948@dragon> (raw)
In-Reply-To: <1411371952-5618-5-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

On Mon, Sep 22, 2014 at 03:45:50PM +0800, Jingchang Lu wrote:
> Signed-off-by: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/arm/fsl.txt | 38 +++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
> index e935d7d..2e0ba09 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.txt
> +++ b/Documentation/devicetree/bindings/arm/fsl.txt
> @@ -74,3 +74,41 @@ Required root node properties:
>  i.MX6q generic board
>  Required root node properties:
>      - compatible = "fsl,imx6q";
> +
> +
> +Freescale LS1021A Platform Device Tree Bindings
> +------------------------------------------------
> +
> +Required root node compatible properties:
> +  - compatible = "fsl,ls1021a";
> +
> +Freescale LS1021A SoC-specific Device Tree Bindings
> +-------------------------------------------
> +
> +Freescale SCFG
> +  scfg is the supplemental configuration unit, that provides SoC specific

s/scfg/SCFG

> +configuration and status registers for the chip. Such as getting PEX port
> +status.
> +  Required properties:
> +  - compatible: should be "fsl,ls1021a-scfg"
> +  - reg: should contain base address and length of SCFG memory-mapped registers
> +
> +Example:
> +	scfg: scfg@1570000 {
> +		compatible = "fsl,ls1021a-scfg";
> +		reg = <0x0 0x1570000 0x0 0x10000>;
> +	};
> +
> +Freescale DCFG
> +  dcfg is the device configuration unit, that provides general purpose

s/dcfg/DCFG

Shawn

> +configuration and status for the device. Such as setting the secondary
> +core start address and release the secondary core from holdoff and startup.
> +  Required properties:
> +  - compatible: should be "fsl,ls1021a-dcfg"
> +  - reg : should contain base address and length of DCFG memory-mapped registers
> +
> +Example:
> +	dcfg: dcfg@1ee0000 {
> +		compatible = "fsl,ls1021a-dcfg";
> +		reg = <0x0 0x1ee0000 0x0 0x10000>;
> +	};
> -- 
> 1.8.0
> 
--
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  reply	other threads:[~2014-09-26  6:18 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-22  7:45 No subject Jingchang Lu
2014-09-22  7:45 ` (unknown), Jingchang Lu
2014-09-22  7:45 ` [PATCHv4 1/6] ARM: dts: Add SoC level device tree support for LS1021A Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-26  5:49   ` Shawn Guo
2014-09-26  5:49     ` Shawn Guo
2014-09-22  7:45 ` [PATCHv4 2/6] ARM: dts: Add initial LS1021A QDS board dts support Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-26  6:13   ` Shawn Guo
2014-09-26  6:13     ` Shawn Guo
2014-09-26  7:51     ` Li.Xiubo at freescale.com
2014-09-26  7:51       ` Li.Xiubo-KZfg59tc24xl57MIdRCFDg
2014-09-28  8:48     ` Jingchang Lu
2014-09-28  8:48       ` Jingchang Lu
2014-09-30  9:39       ` Arnd Bergmann
2014-09-30  9:39         ` Arnd Bergmann
2014-09-22  7:45 ` [PATCHv4 3/6] ARM: dts: Add initial LS1021A TWR " Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-23 14:54   ` Arnd Bergmann
2014-09-23 14:54     ` Arnd Bergmann
2014-09-24  5:47     ` Jingchang Lu
2014-09-24  5:47       ` Jingchang Lu
2014-09-24  9:36       ` Arnd Bergmann
2014-09-24  9:36         ` Arnd Bergmann
2014-09-24 11:00         ` Jingchang Lu
2014-09-24 11:00           ` Jingchang Lu
2014-09-24 15:54           ` Arnd Bergmann
2014-09-24 15:54             ` Arnd Bergmann
2014-09-25  8:06             ` Jingchang Lu
2014-09-25  8:06               ` Jingchang Lu
2014-09-25 10:57               ` Arnd Bergmann
2014-09-25 10:57                 ` Arnd Bergmann
2014-09-22  7:45 ` [PATCHv4 4/6] dt-bindings: arm: add Freescale LS1021A SoC device tree binding Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-26  6:18   ` Shawn Guo [this message]
2014-09-26  6:18     ` Shawn Guo
2014-09-22  7:45 ` [PATCHv4 5/6] ARM: imx: Add initial support for Freescale LS1021A Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-26  6:30   ` Shawn Guo
2014-09-26  6:30     ` Shawn Guo
2014-09-22  7:45 ` [PATCHv4 6/6] ARM: imx: Add Freescale LS1021A SMP support Jingchang Lu
2014-09-22  7:45   ` Jingchang Lu
2014-09-26  6:33   ` Shawn Guo
2014-09-26  6:33     ` Shawn Guo

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