From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller
Date: Tue, 30 Sep 2014 17:55:33 +0200 [thread overview]
Message-ID: <20140930155533.GP4081@lukather> (raw)
In-Reply-To: <1411807795-6575-8-git-send-email-wens@csie.org>
On Sat, Sep 27, 2014 at 04:49:55PM +0800, Chen-Yu Tsai wrote:
> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index caf879d..d7845d3 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -353,6 +353,11 @@
> clocks = <&ahb1_gates 6>;
> resets = <&ahb1_rst 6>;
> #dma-cells = <1>;
> +
> + /* DMA controller requires AHB1 clocked from PLL6 */
> + assigned-clocks = <&ahb1>;
> + assigned-clock-parents = <&pll6 0>;
> + assigned-clock-rates = <200000000>;
Again, I don't think we need the rate change, and that it's the right
place to put it.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
Dan Williams
<dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
Grant Likely
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 7/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller
Date: Tue, 30 Sep 2014 17:55:33 +0200 [thread overview]
Message-ID: <20140930155533.GP4081@lukather> (raw)
In-Reply-To: <1411807795-6575-8-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1012 bytes --]
On Sat, Sep 27, 2014 at 04:49:55PM +0800, Chen-Yu Tsai wrote:
> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index caf879d..d7845d3 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -353,6 +353,11 @@
> clocks = <&ahb1_gates 6>;
> resets = <&ahb1_rst 6>;
> #dma-cells = <1>;
> +
> + /* DMA controller requires AHB1 clocked from PLL6 */
> + assigned-clocks = <&ahb1>;
> + assigned-clock-parents = <&pll6 0>;
> + assigned-clock-rates = <200000000>;
Again, I don't think we need the rate change, and that it's the right
place to put it.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2014-09-30 15:55 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-27 8:49 [PATCH v2 0/6] clk: sun6i: Unify AHB1 clock and fix rate calculation Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 1/7] clk: sunxi: Specify number of child clocks for divs clocks Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-30 15:40 ` Maxime Ripard
2014-09-30 15:40 ` Maxime Ripard
2014-09-30 15:56 ` Chen-Yu Tsai
2014-09-30 15:56 ` Chen-Yu Tsai
2014-10-03 14:05 ` Maxime Ripard
2014-10-03 14:05 ` Maxime Ripard
2014-09-27 8:49 ` [PATCH v2 2/7] clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-30 15:39 ` Maxime Ripard
2014-09-30 15:39 ` Maxime Ripard
2014-09-30 15:50 ` Chen-Yu Tsai
2014-09-30 15:50 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 3/7] ARM: sun6i: DT: Add PLL6 multiple outputs Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 4/7] clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-30 15:54 ` Maxime Ripard
2014-09-30 15:54 ` Maxime Ripard
2014-10-06 12:58 ` Chen-Yu Tsai
2014-10-06 12:58 ` Chen-Yu Tsai
2014-10-06 13:44 ` Chen-Yu Tsai
2014-10-06 13:44 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 5/7] ARM: dts: sun6i: Unify ahb1 clock nodes Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 6/7] ARM: dts: sun8i: " Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-27 8:49 ` [PATCH v2 7/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller Chen-Yu Tsai
2014-09-27 8:49 ` Chen-Yu Tsai
2014-09-30 15:55 ` Maxime Ripard [this message]
2014-09-30 15:55 ` Maxime Ripard
2014-10-09 3:01 ` Chen-Yu Tsai
2014-10-09 3:01 ` Chen-Yu Tsai
2014-10-13 10:02 ` Maxime Ripard
2014-10-13 10:02 ` Maxime Ripard
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