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From: pavel@denx.de (Pavel Machek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] socfpga: hotplug: put cpu1 in wfi
Date: Thu, 2 Oct 2014 01:16:46 +0200	[thread overview]
Message-ID: <20141001231646.GB1529@amd> (raw)
In-Reply-To: <542C26B6.7010302@opensource.altera.com>

On Wed 2014-10-01 11:07:18, Dinh Nguyen wrote:
> 
> 
> On 10/1/14, 10:04 AM, Pavel Machek wrote:
> > Hi!
> > 
> >>>> +		__raw_writel(RSTMGR_MPUMODRST_CPU1,
> >>>> +			     rst_manager_base_addr + 0x10);
> >>>
> >>> Would it be possible to copy reset manager description struct from
> >>> u-boot and use it here, instead of raw offset?
> >>
> >> I will replace this 0x10 with a macro that reflects how the register is 
> >> named in the register map.
> > 
> > That would be better than 0x10, but even better would be just copying
> > 
> > struct socfpga_reset_manager {
> >         u32     status;
> >         u32     ctrl;
> >         u32     counts;
> >         u32     padding1;
> >         u32     mpu_mod_reset;
> >         u32     per_mod_reset;
> >         u32     per2_mod_reset;
> >         u32     brg_mod_reset;
> > };
> > 
> > from u-boot. Unlike macros, structs have advantages that typos lead to
> > easier-to-see failure modes... (And they are easier to read/parse,
> > too).
> > 
> 
> Copying from uboot sounds good, but I already know that the CPU reset
> offset is different for our next SOC, Arria 10. The Arria 10 SOC should
> still be able to use the same MSL as Cyclone5 and Arria5, but with a few
> differences. One of them being, the CPU1 reset offset is at 0x20 instead
> of 0x10. So I think having a macro for this one register is a bit
> cleaner than having to define a whole new struct for Arria10.

I don't think "whole new struct" is a problem. At least it will be
plain to see what changed (which will get easily lost in ifdefs.

struct cyclone5_reset_manager {
	struct socfpga_reset_manager common;
	u32 brg_mod_reset;
}

struct aria10_reset_manager {
	struct socfpga_reset_manager common;
	char filler[0x10];
	u32 brg_mod_reset;
}

if (of_machine_is_compatible("altr,socfpga-arria10"))
	__raw_writel(0, (struct cyclone5_reset_manager *) rst_manager_base_addr->brg_mod_reset));
else
	__raw_writel(0, (struct aria10_reset_manager *) rst_manager_base_addr->brg_mod_reset));

...does not sound that bad. (And you'll need some nice solution for
u-boot, anyway...)

Best regards,
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

WARNING: multiple messages have this Message-ID (diff)
From: Pavel Machek <pavel@denx.de>
To: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: atull <atull@opensource.altera.com>,
	linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, delicious.quinoa@gmail.com,
	yvanderv@opensource.altera.com
Subject: Re: [PATCH 1/2] socfpga: hotplug: put cpu1 in wfi
Date: Thu, 2 Oct 2014 01:16:46 +0200	[thread overview]
Message-ID: <20141001231646.GB1529@amd> (raw)
In-Reply-To: <542C26B6.7010302@opensource.altera.com>

On Wed 2014-10-01 11:07:18, Dinh Nguyen wrote:
> 
> 
> On 10/1/14, 10:04 AM, Pavel Machek wrote:
> > Hi!
> > 
> >>>> +		__raw_writel(RSTMGR_MPUMODRST_CPU1,
> >>>> +			     rst_manager_base_addr + 0x10);
> >>>
> >>> Would it be possible to copy reset manager description struct from
> >>> u-boot and use it here, instead of raw offset?
> >>
> >> I will replace this 0x10 with a macro that reflects how the register is 
> >> named in the register map.
> > 
> > That would be better than 0x10, but even better would be just copying
> > 
> > struct socfpga_reset_manager {
> >         u32     status;
> >         u32     ctrl;
> >         u32     counts;
> >         u32     padding1;
> >         u32     mpu_mod_reset;
> >         u32     per_mod_reset;
> >         u32     per2_mod_reset;
> >         u32     brg_mod_reset;
> > };
> > 
> > from u-boot. Unlike macros, structs have advantages that typos lead to
> > easier-to-see failure modes... (And they are easier to read/parse,
> > too).
> > 
> 
> Copying from uboot sounds good, but I already know that the CPU reset
> offset is different for our next SOC, Arria 10. The Arria 10 SOC should
> still be able to use the same MSL as Cyclone5 and Arria5, but with a few
> differences. One of them being, the CPU1 reset offset is at 0x20 instead
> of 0x10. So I think having a macro for this one register is a bit
> cleaner than having to define a whole new struct for Arria10.

I don't think "whole new struct" is a problem. At least it will be
plain to see what changed (which will get easily lost in ifdefs.

struct cyclone5_reset_manager {
	struct socfpga_reset_manager common;
	u32 brg_mod_reset;
}

struct aria10_reset_manager {
	struct socfpga_reset_manager common;
	char filler[0x10];
	u32 brg_mod_reset;
}

if (of_machine_is_compatible("altr,socfpga-arria10"))
	__raw_writel(0, (struct cyclone5_reset_manager *) rst_manager_base_addr->brg_mod_reset));
else
	__raw_writel(0, (struct aria10_reset_manager *) rst_manager_base_addr->brg_mod_reset));

...does not sound that bad. (And you'll need some nice solution for
u-boot, anyway...)

Best regards,
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

  reply	other threads:[~2014-10-01 23:16 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-24 20:27 [PATCH 0/2] socfpga: fix hotplug/add suspend to ram atull at opensource.altera.com
2014-09-24 20:27 ` atull
2014-09-24 20:27 ` [PATCH 1/2] socfpga: hotplug: put cpu1 in wfi atull at opensource.altera.com
2014-09-24 20:27   ` atull
2014-09-24 21:28   ` Russell King - ARM Linux
2014-09-24 21:28     ` Russell King - ARM Linux
2014-09-25 15:06     ` atull
2014-09-25 15:06       ` atull
2014-10-01 13:35   ` Pavel Machek
2014-10-01 13:35     ` Pavel Machek
2014-10-01 14:17     ` atull
2014-10-01 14:17       ` atull
2014-10-01 15:04       ` Pavel Machek
2014-10-01 15:04         ` Pavel Machek
2014-10-01 16:07         ` Dinh Nguyen
2014-10-01 16:07           ` Dinh Nguyen
2014-10-01 23:16           ` Pavel Machek [this message]
2014-10-01 23:16             ` Pavel Machek
2014-10-02 11:36             ` Dinh Nguyen
2014-10-02 11:36               ` Dinh Nguyen
2014-10-02 12:18             ` Arnd Bergmann
2014-10-02 12:18               ` Arnd Bergmann
2014-10-02 21:03               ` atull
2014-10-02 21:03                 ` atull
2014-09-24 20:27 ` [PATCH 2/2] socfpga: support suspend to ram atull at opensource.altera.com
2014-09-24 20:27   ` atull
2014-09-25  8:25   ` Steffen Trumtrar
2014-09-25  8:25     ` Steffen Trumtrar
2014-09-25 17:10     ` atull
2014-09-25 17:10       ` atull
2014-09-26 14:56   ` Dinh Nguyen
2014-09-26 14:56     ` Dinh Nguyen
2014-09-26 20:23     ` atull
2014-09-26 20:23       ` atull
2014-10-01 13:49   ` Pavel Machek
2014-10-01 13:49     ` Pavel Machek
2014-10-01 19:24     ` atull
2014-10-01 19:24       ` atull

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