From: Gleb Natapov <gleb@kernel.org>
To: Wei Huang <wei@redhat.com>
Cc: pbonzini@redhat.com, KVM <kvm@vger.kernel.org>
Subject: Re: [RFC] vPMU support for AMD system
Date: Sat, 4 Oct 2014 10:00:16 +0300 [thread overview]
Message-ID: <20141004070016.GR26540@minantech.com> (raw)
In-Reply-To: <542B61DA.3070307@redhat.com>
Hi,
On Tue, Sep 30, 2014 at 09:07:22PM -0500, Wei Huang wrote:
> Hi Paolo and Gleb,
>
> The attached file is a preliminary version of AMD vPMU support for KVM.
> Currently I am working on a formal patch set; but realized that there are
> some design choice to make (see below). I thought it is better to send it
> out now, asking for your comments before sending out patchset v1.
>
> If you are OK with current approach, please let me know. Otherwise please
> share your suggestions/comments on the design choice (see suggestions
> below). I will send out split patch set soon.
>
I am not very familiar with AMD PMU, but IIRC is lacks architectural PMU, so the
first question that comes to my mind is:
> +static struct kvm_event_hw_type_mapping amd_event_mapping[] = {
> + [0] = { 0x76, 0x00, PERF_COUNT_HW_CPU_CYCLES },
> + [1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },
> + [3] = { 0x80, 0x00, PERF_COUNT_HW_CACHE_REFERENCES },
> + [4] = { 0x81, 0x00, PERF_COUNT_HW_CACHE_MISSES },
> + [5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
> + [6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES },
> +};
> +
Are those evens count exactly same things on all AMD cpus?
--
Gleb.
next prev parent reply other threads:[~2014-10-04 7:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 2:07 [RFC] vPMU support for AMD system Wei Huang
2014-10-02 13:50 ` Radim Krčmář
2014-10-02 14:15 ` Wei Huang
2014-10-04 7:00 ` Gleb Natapov [this message]
2014-10-06 14:26 ` Wei Huang
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