From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Nadav Amit <namit@cs.technion.ac.il>
Cc: pbonzini@redhat.com, joro@8bytes.org, kvm@vger.kernel.org
Subject: Re: [PATCH 4/5] KVM: vmx: Unavailable DR4/5 is checked before CPL
Date: Mon, 6 Oct 2014 21:33:37 +0200 [thread overview]
Message-ID: <20141006193337.GA2722@potion.brq.redhat.com> (raw)
In-Reply-To: <1412287806-16016-5-git-send-email-namit@cs.technion.ac.il>
2014-10-03 01:10+0300, Nadav Amit:
> If DR4/5 is accessed when it is unavailable (since CR4.DE is set), then #UD
> should be generated even if CPL>0. This is according to Intel SDM Table 6-2:
> "Priority Among Simultaneous Exceptions and Interrupts".
>
> Note, that this may happen on the first DR access, even if the host does not
> sets debug breakpoints. Obviously, it occurs when the host debugs the guest.
(This got me confused for a while; "first" because we disable DR exiting
in the handler.)
> This patch moves the DR4/5 checks from __kvm_set_dr/_kvm_get_dr to handle_dr.
> The emulator already checks DR4/5 availability in check_dr_read. Nested
> virutalization related calls to kvm_set_dr/kvm_get_dr would not like to inject
> exceptions to the guest.
>
> As for SVM, the patch follows the previous logic as much as possible. Anyhow,
> it appears the DR interception code might be buggy - even if the DR access
> may cause an exception, the instruction is skipped.
SVM likely injects GP (UD) before it intercepts DR. [2:Table 15-7]:
All normal exception checks take precedence over the SVM intercepts.
=> no need to check even in our case.
> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> ---
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 6857257..e903167 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -806,8 +816,6 @@ static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
> vcpu->arch.eff_db[dr] = val;
> break;
> case 4:
> - if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
WARN_ONCE_ON() instead?
> - return 1; /* #UD */
> /* fall through */
> case 6:
> if (val & 0xffffffff00000000ULL)
next prev parent reply other threads:[~2014-10-06 19:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-02 22:10 [PATCH 0/5] KVM: x86: Various bug fixes Nadav Amit
2014-10-02 22:10 ` [PATCH 1/5] KVM: x86: Clear DR7.LE during task-switch Nadav Amit
2014-10-06 19:45 ` Radim Krčmář
2014-10-02 22:10 ` [PATCH 2/5] KVM: x86: Emulator performs code segment checks on read access Nadav Amit
2014-10-06 20:32 ` Radim Krčmář
2014-10-10 2:07 ` [PATCH v2 " Nadav Amit
2014-10-10 15:54 ` Radim Krčmář
2014-10-11 9:39 ` Paolo Bonzini
2014-10-12 6:57 ` Nadav Amit
2014-10-12 12:12 ` Paolo Bonzini
2014-10-12 23:15 ` Nadav Amit
2014-10-13 4:29 ` Paolo Bonzini
2014-10-13 11:31 ` Gleb Natapov
2014-10-19 16:07 ` Nadav Amit
2014-10-02 22:10 ` [PATCH 3/5] KVM: x86: Decoding guest instructions which cross page boundary may fail Nadav Amit
2014-10-06 20:50 ` Radim Krčmář
2014-10-07 9:15 ` Nadav Amit
2014-10-08 9:02 ` Paolo Bonzini
2014-10-02 22:10 ` [PATCH 4/5] KVM: vmx: Unavailable DR4/5 is checked before CPL Nadav Amit
2014-10-06 19:33 ` Radim Krčmář [this message]
2014-10-02 22:10 ` [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes Nadav Amit
2014-10-06 20:57 ` Radim Krčmář
2014-10-07 9:35 ` Nadav Amit
2014-10-08 10:06 ` Radim Krčmář
2014-10-08 10:07 ` Paolo Bonzini
2014-10-10 1:55 ` Nadav Amit
2014-10-10 9:45 ` Paolo Bonzini
2014-10-10 12:50 ` Radim Krčmář
2014-10-10 12:51 ` Nadav Amit
2014-10-10 13:55 ` Paolo Bonzini
2014-10-10 14:02 ` Paolo Bonzini
2014-10-08 9:29 ` Paolo Bonzini
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