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From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Nadav Amit <namit@cs.technion.ac.il>
Cc: pbonzini@redhat.com, joro@8bytes.org, kvm@vger.kernel.org
Subject: Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes
Date: Mon, 6 Oct 2014 22:57:37 +0200	[thread overview]
Message-ID: <20141006205737.GC2722@potion.brq.redhat.com> (raw)
In-Reply-To: <1412287806-16016-6-git-send-email-namit@cs.technion.ac.il>

2014-10-03 01:10+0300, Nadav Amit:
> Setting the TSC deadline MSR that are initiated by the host (using ioctl's) may
> cause superfluous interrupt.  This occurs in the following case:
> 
> 1. A TSC deadline timer interrupt is pending.
> 2. TSC deadline was still not cleared (which happens during vcpu_run).
> 3. Userspace uses KVM_GET_MSRS/KVM_SET_MSRS to load the same deadline msr.
> 
> To solve this situation, ignore host initiated TSC deadline writes that do not
> change the deadline value.

I find this change slightly dubious ...
 - why does the userspace do that?
 - why is host_initiated required?

Thanks.

It seems like an performance improvement, so why shouldn't return when
  'data <= tscdeadline && pending()'
or even
  'data <= now() && pending()'

(Sorry, I ran out of time to search for answers today.)

> Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
> ---
>  arch/x86/kvm/lapic.c | 7 ++++++-
>  arch/x86/kvm/lapic.h | 3 ++-
>  arch/x86/kvm/x86.c   | 2 +-
>  3 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index b8345dd..0bcf2e1 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1346,14 +1346,19 @@ u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu)
>  	return apic->lapic_timer.tscdeadline;
>  }
>  
> -void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data)
> +void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu,
> +				   struct msr_data *msr_info)
>  {
>  	struct kvm_lapic *apic = vcpu->arch.apic;
> +	u64 data = msr_info->data;
>  
>  	if (!kvm_vcpu_has_lapic(vcpu) || apic_lvtt_oneshot(apic) ||
>  			apic_lvtt_period(apic))
>  		return;
>  
> +	if (msr_info->host_initiated && apic->lapic_timer.tscdeadline == data)
> +		return;
> +
>  	hrtimer_cancel(&apic->lapic_timer.timer);
>  	/* Inject here so clearing tscdeadline won't override new value */
>  	if (apic_has_pending_timer(vcpu))
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index 6a11845..5bfa3db 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -71,7 +71,8 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
>  int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
>  
>  u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
> -void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
> +void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu,
> +				struct msr_data *msr_info);
>  
>  void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
>  void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index e903167..8c2745c 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2093,7 +2093,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
>  		return kvm_x2apic_msr_write(vcpu, msr, data);
>  	case MSR_IA32_TSCDEADLINE:
> -		kvm_set_lapic_tscdeadline_msr(vcpu, data);
> +		kvm_set_lapic_tscdeadline_msr(vcpu, msr_info);
>  		break;
>  	case MSR_IA32_TSC_ADJUST:
>  		if (guest_cpuid_has_tsc_adjust(vcpu)) {
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  reply	other threads:[~2014-10-06 20:57 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-02 22:10 [PATCH 0/5] KVM: x86: Various bug fixes Nadav Amit
2014-10-02 22:10 ` [PATCH 1/5] KVM: x86: Clear DR7.LE during task-switch Nadav Amit
2014-10-06 19:45   ` Radim Krčmář
2014-10-02 22:10 ` [PATCH 2/5] KVM: x86: Emulator performs code segment checks on read access Nadav Amit
2014-10-06 20:32   ` Radim Krčmář
2014-10-10  2:07     ` [PATCH v2 " Nadav Amit
2014-10-10 15:54       ` Radim Krčmář
2014-10-11  9:39         ` Paolo Bonzini
2014-10-12  6:57           ` Nadav Amit
2014-10-12 12:12             ` Paolo Bonzini
2014-10-12 23:15               ` Nadav Amit
2014-10-13  4:29                 ` Paolo Bonzini
2014-10-13 11:31                 ` Gleb Natapov
2014-10-19 16:07                   ` Nadav Amit
2014-10-02 22:10 ` [PATCH 3/5] KVM: x86: Decoding guest instructions which cross page boundary may fail Nadav Amit
2014-10-06 20:50   ` Radim Krčmář
2014-10-07  9:15     ` Nadav Amit
2014-10-08  9:02       ` Paolo Bonzini
2014-10-02 22:10 ` [PATCH 4/5] KVM: vmx: Unavailable DR4/5 is checked before CPL Nadav Amit
2014-10-06 19:33   ` Radim Krčmář
2014-10-02 22:10 ` [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes Nadav Amit
2014-10-06 20:57   ` Radim Krčmář [this message]
2014-10-07  9:35     ` Nadav Amit
2014-10-08 10:06       ` Radim Krčmář
2014-10-08 10:07         ` Paolo Bonzini
2014-10-10  1:55         ` Nadav Amit
2014-10-10  9:45           ` Paolo Bonzini
2014-10-10 12:50             ` Radim Krčmář
2014-10-10 12:51             ` Nadav Amit
2014-10-10 13:55               ` Paolo Bonzini
2014-10-10 14:02         ` Paolo Bonzini
2014-10-08  9:29   ` Paolo Bonzini

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