* [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms
@ 2014-10-06 17:56 Damien Lespiau
2014-10-06 17:56 ` [PATCH i-g-t 2/3] quick_dump/skl: Add some display registers Damien Lespiau
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Damien Lespiau @ 2014-10-06 17:56 UTC (permalink / raw)
To: intel-gfx
SKL will have a whole separate display regs file, so merge
base_display.txt into each platform file.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
tools/quick_dump/broadwell | 1 +
tools/quick_dump/cherryview | 1 +
tools/quick_dump/{base_display.txt => common_display.txt} | 0
tools/quick_dump/haswell | 1 +
tools/quick_dump/ivybridge | 1 +
tools/quick_dump/sandybridge | 1 +
tools/quick_dump/valleyview | 1 +
7 files changed, 6 insertions(+)
rename tools/quick_dump/{base_display.txt => common_display.txt} (100%)
diff --git a/tools/quick_dump/broadwell b/tools/quick_dump/broadwell
index 35c5cc7..7888a36 100644
--- a/tools/quick_dump/broadwell
+++ b/tools/quick_dump/broadwell
@@ -1,3 +1,4 @@
+common_display.txt
gen7_other.txt
haswell_other.txt
gen8_interrupt.txt
diff --git a/tools/quick_dump/cherryview b/tools/quick_dump/cherryview
index a86abe2..069dc86 100644
--- a/tools/quick_dump/cherryview
+++ b/tools/quick_dump/cherryview
@@ -1,3 +1,4 @@
+common_display.txt
vlv_pipe_a.txt
vlv_pipe_b.txt
chv_pipe_c.txt
diff --git a/tools/quick_dump/base_display.txt b/tools/quick_dump/common_display.txt
similarity index 100%
rename from tools/quick_dump/base_display.txt
rename to tools/quick_dump/common_display.txt
diff --git a/tools/quick_dump/haswell b/tools/quick_dump/haswell
index d449843..94ffb7c 100644
--- a/tools/quick_dump/haswell
+++ b/tools/quick_dump/haswell
@@ -1,3 +1,4 @@
+common_display.txt
gen7_other.txt
haswell_other.txt
audio_config_haswell_plus.txt
diff --git a/tools/quick_dump/ivybridge b/tools/quick_dump/ivybridge
index 4637b42..79bda9b 100644
--- a/tools/quick_dump/ivybridge
+++ b/tools/quick_dump/ivybridge
@@ -1 +1,2 @@
+common_display.txt
gen7_other.txt
diff --git a/tools/quick_dump/sandybridge b/tools/quick_dump/sandybridge
index 6ece0fd..a0a4474 100644
--- a/tools/quick_dump/sandybridge
+++ b/tools/quick_dump/sandybridge
@@ -1 +1,2 @@
+common_display.txt
gen6_other.txt
diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview
index 2611a98..64f0cac 100644
--- a/tools/quick_dump/valleyview
+++ b/tools/quick_dump/valleyview
@@ -1,3 +1,4 @@
+common_display.txt
vlv_pipe_a.txt
vlv_pipe_b.txt
vlv_display_base.txt
--
1.8.3.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH i-g-t 2/3] quick_dump/skl: Add some display registers 2014-10-06 17:56 [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Damien Lespiau @ 2014-10-06 17:56 ` Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 3/3] quick_dump/skl: Make quick_dump SKL aware Damien Lespiau 2014-10-07 10:26 ` [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Ville Syrjälä 2 siblings, 0 replies; 5+ messages in thread From: Damien Lespiau @ 2014-10-06 17:56 UTC (permalink / raw) To: intel-gfx Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- tools/quick_dump/skl_display.txt | 285 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 285 insertions(+) create mode 100644 tools/quick_dump/skl_display.txt diff --git a/tools/quick_dump/skl_display.txt b/tools/quick_dump/skl_display.txt new file mode 100644 index 0000000..29f6524 --- /dev/null +++ b/tools/quick_dump/skl_display.txt @@ -0,0 +1,285 @@ +# CLOCKS +('DPLL_STATUS', '0x6c060', '') +('DPLL1_CFGCR1', '0x6c040', '') +('DPLL2_CFGCR1', '0x6c048', '') +('DPLL3_CFGCR1', '0x6c050', '') +('DPLL1_CFGCR2', '0x6c044', '') +('DPLL2_CFGCR2', '0x6c04c', '') +('DPLL3_CFGCR2', '0x6c054', '') +('DPLL_CTRL1', '0x6c058', '') +('DPLL_CTRL2', '0x6c05c', '') +('CDCLK_CTL', '0x46000', '') +('LCPLL1_CTL', '0x46010', '') +('LCPLL2_CTL', '0x46014', '') +('TRANS_CLK_SEL_A', '0x46140', '') +('TRANS_CLK_SEL_B', '0x46144', '') +('TRANS_CLK_SEL_C', '0x46148', '') +('WRPLL_CTL1', '0x46040', '') +('WRPLL_CTL2', '0x46060', '') +# PIPE_A_PLANE +('PLANE_BUF_CFG_1_A', '0x7027c', '') +('PLANE_BUF_CFG_2_A', '0x7037c', '') +('PLANE_BUF_CFG_3_A', '0x7047c', '') +('PLANE_CTL_1_A', '0x70180', '') +('PLANE_CTL_2_A', '0x70280', '') +('PLANE_CTL_3_A', '0x70380', '') +('PLANE_KEYMAX_1_A', '0x701a0', '') +('PLANE_KEYMAX_2_A', '0x702a0', '') +('PLANE_KEYMAX_3_A', '0x703a0', '') +('PLANE_KEYMSK_1_A', '0x70198', '') +('PLANE_KEYMSK_2_A', '0x70298', '') +('PLANE_KEYMSK_3_A', '0x70398', '') +('PLANE_KEYVAL_1_A', '0x70194', '') +('PLANE_KEYVAL_2_A', '0x70294', '') +('PLANE_KEYVAL_3_A', '0x70394', '') +('PLANE_OFFSET_1_A', '0x701a4', '') +('PLANE_OFFSET_2_A', '0x702a4', '') +('PLANE_OFFSET_3_A', '0x703a4', '') +('PLANE_POS_1_A', '0x7018c', '') +('PLANE_POS_2_A', '0x7028c', '') +('PLANE_POS_3_A', '0x7038c', '') +('PLANE_SIZE_1_A', '0x70190', '') +('PLANE_SIZE_2_A', '0x70290', '') +('PLANE_SIZE_3_A', '0x70390', '') +('PLANE_STRIDE_1_A', '0x70188', '') +('PLANE_STRIDE_2_A', '0x70288', '') +('PLANE_STRIDE_3_A', '0x70388', '') +('PLANE_SURF_1_A', '0x7019c', '') +('PLANE_SURF_2_A', '0x7029c', '') +('PLANE_SURF_3_A', '0x7039c', '') +('PLANE_SURFLIVE_1_A', '0x701ac', '') +('PLANE_SURFLIVE_2_A', '0x702ac', '') +('PLANE_SURFLIVE_3_A', '0x703ac', '') +('PLANE_WM_1_A_0', '0x70240', '') +('PLANE_WM_1_A_1', '0x70244', '') +('PLANE_WM_1_A_2', '0x70248', '') +('PLANE_WM_1_A_3', '0x7024c', '') +('PLANE_WM_1_A_4', '0x70250', '') +('PLANE_WM_1_A_5', '0x70254', '') +('PLANE_WM_1_A_6', '0x70258', '') +('PLANE_WM_1_A_7', '0x7025c', '') +('PLANE_WM_2_A_0', '0x70340', '') +('PLANE_WM_2_A_1', '0x70344', '') +('PLANE_WM_2_A_2', '0x70348', '') +('PLANE_WM_2_A_3', '0x7034c', '') +('PLANE_WM_2_A_4', '0x70350', '') +('PLANE_WM_2_A_5', '0x70354', '') +('PLANE_WM_2_A_6', '0x70358', '') +('PLANE_WM_2_A_7', '0x7035c', '') +('PLANE_WM_3_A_0', '0x70440', '') +('PLANE_WM_3_A_1', '0x70444', '') +('PLANE_WM_3_A_2', '0x70448', '') +('PLANE_WM_3_A_3', '0x7044c', '') +('PLANE_WM_3_A_4', '0x70450', '') +('PLANE_WM_3_A_5', '0x70454', '') +('PLANE_WM_3_A_6', '0x70458', '') +('PLANE_WM_3_A_7', '0x7045c', '') +('PLANE_WM_TRANS_1_A', '0x70268', '') +('PLANE_WM_TRANS_2_A', '0x70368', '') +('PLANE_WM_TRANS_3_A', '0x70468', '') +# PIPE_B_PLANE +('PLANE_BUF_CFG_1_B', '0x7127c', '') +('PLANE_BUF_CFG_2_B', '0x7137c', '') +('PLANE_BUF_CFG_3_B', '0x7147c', '') +('PLANE_CTL_1_B', '0x71180', '') +('PLANE_CTL_2_B', '0x71280', '') +('PLANE_CTL_3_B', '0x71380', '') +('PLANE_KEYMAX_1_B', '0x711a0', '') +('PLANE_KEYMAX_2_B', '0x712a0', '') +('PLANE_KEYMAX_3_B', '0x713a0', '') +('PLANE_KEYMSK_1_B', '0x71198', '') +('PLANE_KEYMSK_2_B', '0x71298', '') +('PLANE_KEYMSK_3_B', '0x71398', '') +('PLANE_KEYVAL_1_B', '0x71194', '') +('PLANE_KEYVAL_2_B', '0x71294', '') +('PLANE_KEYVAL_3_B', '0x71394', '') +('PLANE_OFFSET_1_B', '0x711a4', '') +('PLANE_OFFSET_2_B', '0x712a4', '') +('PLANE_OFFSET_3_B', '0x713a4', '') +('PLANE_POS_1_B', '0x7118c', '') +('PLANE_POS_2_B', '0x7128c', '') +('PLANE_POS_3_B', '0x7138c', '') +('PLANE_SIZE_1_B', '0x71190', '') +('PLANE_SIZE_2_B', '0x71290', '') +('PLANE_SIZE_3_B', '0x71390', '') +('PLANE_STRIDE_1_B', '0x71188', '') +('PLANE_STRIDE_2_B', '0x71288', '') +('PLANE_STRIDE_3_B', '0x71388', '') +('PLANE_SURF_1_B', '0x7119c', '') +('PLANE_SURF_2_B', '0x7129c', '') +('PLANE_SURF_3_B', '0x7139c', '') +('PLANE_SURFLIVE_1_B', '0x711ac', '') +('PLANE_SURFLIVE_2_B', '0x712ac', '') +('PLANE_SURFLIVE_3_B', '0x713ac', '') +('PLANE_WM_1_B_0', '0x71240', '') +('PLANE_WM_1_B_1', '0x71244', '') +('PLANE_WM_1_B_2', '0x71248', '') +('PLANE_WM_1_B_3', '0x7124c', '') +('PLANE_WM_1_B_4', '0x71250', '') +('PLANE_WM_1_B_5', '0x71254', '') +('PLANE_WM_1_B_6', '0x71258', '') +('PLANE_WM_1_B_7', '0x7125c', '') +('PLANE_WM_2_B_0', '0x71340', '') +('PLANE_WM_2_B_1', '0x71344', '') +('PLANE_WM_2_B_2', '0x71348', '') +('PLANE_WM_2_B_3', '0x7134c', '') +('PLANE_WM_2_B_4', '0x71350', '') +('PLANE_WM_2_B_5', '0x71354', '') +('PLANE_WM_2_B_6', '0x71358', '') +('PLANE_WM_2_B_7', '0x7135c', '') +('PLANE_WM_3_B_0', '0x71440', '') +('PLANE_WM_3_B_1', '0x71444', '') +('PLANE_WM_3_B_2', '0x71448', '') +('PLANE_WM_3_B_3', '0x7144c', '') +('PLANE_WM_3_B_4', '0x71450', '') +('PLANE_WM_3_B_5', '0x71454', '') +('PLANE_WM_3_B_6', '0x71458', '') +('PLANE_WM_3_B_7', '0x7145c', '') +('PLANE_WM_TRANS_1_B', '0x71268', '') +('PLANE_WM_TRANS_2_B', '0x71368', '') +('PLANE_WM_TRANS_3_B', '0x71468', '') +# PIPE_C_PLANE +('PLANE_BUF_CFG_1_C', '0x7227c', '') +('PLANE_BUF_CFG_2_C', '0x7237c', '') +('PLANE_BUF_CFG_3_C', '0x7247c', '') +('PLANE_CTL_1_C', '0x72180', '') +('PLANE_CTL_2_C', '0x72280', '') +('PLANE_CTL_3_C', '0x72380', '') +('PLANE_KEYMAX_1_C', '0x721a0', '') +('PLANE_KEYMAX_2_C', '0x722a0', '') +('PLANE_KEYMAX_3_C', '0x723a0', '') +('PLANE_KEYMSK_1_C', '0x72198', '') +('PLANE_KEYMSK_2_C', '0x72298', '') +('PLANE_KEYMSK_3_C', '0x72398', '') +('PLANE_KEYVAL_1_C', '0x72194', '') +('PLANE_KEYVAL_2_C', '0x72294', '') +('PLANE_KEYVAL_3_C', '0x72394', '') +('PLANE_OFFSET_1_C', '0x721a4', '') +('PLANE_OFFSET_2_C', '0x722a4', '') +('PLANE_OFFSET_3_C', '0x723a4', '') +('PLANE_POS_1_C', '0x7218c', '') +('PLANE_POS_2_C', '0x7228c', '') +('PLANE_POS_3_C', '0x7238c', '') +('PLANE_SIZE_1_C', '0x72190', '') +('PLANE_SIZE_2_C', '0x72290', '') +('PLANE_SIZE_3_C', '0x72390', '') +('PLANE_STRIDE_1_C', '0x72188', '') +('PLANE_STRIDE_2_C', '0x72288', '') +('PLANE_STRIDE_3_C', '0x72388', '') +('PLANE_SURF_1_C', '0x7219c', '') +('PLANE_SURF_2_C', '0x7229c', '') +('PLANE_SURF_3_C', '0x7239c', '') +('PLANE_SURFLIVE_1_C', '0x721ac', '') +('PLANE_SURFLIVE_2_C', '0x722ac', '') +('PLANE_SURFLIVE_3_C', '0x723ac', '') +('PLANE_WM_1_C_0', '0x72240', '') +('PLANE_WM_1_C_1', '0x72244', '') +('PLANE_WM_1_C_2', '0x72248', '') +('PLANE_WM_1_C_3', '0x7224c', '') +('PLANE_WM_1_C_4', '0x72250', '') +('PLANE_WM_1_C_5', '0x72254', '') +('PLANE_WM_1_C_6', '0x72258', '') +('PLANE_WM_1_C_7', '0x7225c', '') +('PLANE_WM_2_C_0', '0x72340', '') +('PLANE_WM_2_C_1', '0x72344', '') +('PLANE_WM_2_C_2', '0x72348', '') +('PLANE_WM_2_C_3', '0x7234c', '') +('PLANE_WM_2_C_4', '0x72350', '') +('PLANE_WM_2_C_5', '0x72354', '') +('PLANE_WM_2_C_6', '0x72358', '') +('PLANE_WM_2_C_7', '0x7235c', '') +('PLANE_WM_3_C_0', '0x72440', '') +('PLANE_WM_3_C_1', '0x72444', '') +('PLANE_WM_3_C_2', '0x72448', '') +('PLANE_WM_3_C_3', '0x7244c', '') +('PLANE_WM_3_C_4', '0x72450', '') +('PLANE_WM_3_C_5', '0x72454', '') +('PLANE_WM_3_C_6', '0x72458', '') +('PLANE_WM_3_C_7', '0x7245c', '') +('PLANE_WM_TRANS_1_C', '0x72268', '') +('PLANE_WM_TRANS_2_C', '0x72368', '') +('PLANE_WM_TRANS_3_C', '0x72468', '') +# TRANSCODER_EDP_CONTROL +('TRANS_CONF_EDP', '0x7f008', '') +# TRANSCODER_EDP_TIMING +('TRANS_HBLANK_EDP', '0x6f004', '') +('TRANS_HSYNC_EDP', '0x6f008', '') +('TRANS_HTOTAL_EDP', '0x6f000', '') +('TRANS_SPACE_EDP', '0x6f024', '') +('TRANS_VBLANK_EDP', '0x6f010', '') +('TRANS_VSYNC_EDP', '0x6f014', '') +('TRANS_VSYNCSHIFT_EDP', '0x6f028', '') +('TRANS_VTOTAL_EDP', '0x6f00c', '') +# TRANSCODER_EDP_M_N +('TRANS_DATAM1_EDP', '0x6f030', '') +('TRANS_DATAN1_EDP', '0x6f034', '') +('TRANS_LINKM1_EDP', '0x6f040', '') +('TRANS_LINKN1_EDP', '0x6f044', '') +# TRANSCODER_EDP_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_EDP', '0x6f400', '') +('TRANS_MSA_MISC_EDP', '0x6f410', '') +# TRANSCODER_A_CONTROL +('TRANS_CONF_A', '0x70008', '') +# TRANSCODER_A_TIMING +('TRANS_HBLANK_A', '0x60004', '') +('TRANS_HSYNC_A', '0x60008', '') +('TRANS_HTOTAL_A', '0x60000', '') +('TRANS_MULT_A', '0x6002c', '') +('TRANS_SPACE_A', '0x60024', '') +('TRANS_VBLANK_A', '0x60010', '') +('TRANS_VSYNC_A', '0x60014', '') +('TRANS_VSYNCSHIFT_A', '0x60028', '') +('TRANS_VTOTAL_A', '0x6000c', '') +# TRANSCODER_A_M_N +('TRANS_DATAM1_A', '0x60030', '') +('TRANS_DATAN1_A', '0x60034', '') +('TRANS_LINKM1_A', '0x60040', '') +('TRANS_LINKN1_A', '0x60044', '') +# TRANSCODER_A_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_A', '0x60400', '') +('TRANS_MSA_MISC_A', '0x60410', '') +# TRANSCODER_B_CONTROL +('TRANS_CONF_B', '0x71008', '') +# TRANSCODER_B_TIMING +('TRANS_HBLANK_B', '0x61004', '') +('TRANS_HSYNC_B', '0x61008', '') +('TRANS_HTOTAL_B', '0x61000', '') +('TRANS_MULT_B', '0x6102c', '') +('TRANS_SPACE_B', '0x61024', '') +('TRANS_VBLANK_B', '0x61010', '') +('TRANS_VSYNC_B', '0x61014', '') +('TRANS_VSYNCSHIFT_B', '0x61028', '') +('TRANS_VTOTAL_B', '0x6100c', '') +# TRANSCODER_B_M_N +('TRANS_DATAM1_B', '0x61030', '') +('TRANS_DATAN1_B', '0x61034', '') +('TRANS_LINKM1_B', '0x61040', '') +('TRANS_LINKN1_B', '0x61044', '') +# TRANSCODER_B_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_B', '0x61400', '') +('TRANS_MSA_MISC_B', '0x61410', '') +# TRANSCODER_C_CONTROL +('TRANS_CONF_C', '0x72008', '') +# TRANSCODER_C_TIMING +('TRANS_HBLANK_C', '0x62004', '') +('TRANS_HSYNC_C', '0x62008', '') +('TRANS_HTOTAL_C', '0x62000', '') +('TRANS_MULT_C', '0x6202c', '') +('TRANS_SPACE_C', '0x62024', '') +('TRANS_VBLANK_C', '0x62010', '') +('TRANS_VSYNC_C', '0x62014', '') +('TRANS_VSYNCSHIFT_C', '0x62028', '') +('TRANS_VTOTAL_C', '0x6200c', '') +# TRANSCODER_C_M_N +('TRANS_DATAM1_C', '0x62030', '') +('TRANS_DATAN1_C', '0x62034', '') +('TRANS_LINKM1_C', '0x62040', '') +('TRANS_LINKN1_C', '0x62044', '') +# TRANSCODER_C_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_C', '0x62400', '') +('TRANS_MSA_MISC_C', '0x62410', '') +# WATERMARK +('WM_LINETIME_A', '0x45270', '') +('WM_LINETIME_B', '0x45274', '') +('WM_LINETIME_C', '0x45278', '') +('WM_MISC', '0x45260', '') -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH i-g-t 3/3] quick_dump/skl: Make quick_dump SKL aware 2014-10-06 17:56 [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 2/3] quick_dump/skl: Add some display registers Damien Lespiau @ 2014-10-06 17:56 ` Damien Lespiau 2014-10-07 10:26 ` [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Ville Syrjälä 2 siblings, 0 replies; 5+ messages in thread From: Damien Lespiau @ 2014-10-06 17:56 UTC (permalink / raw) To: intel-gfx Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- tools/quick_dump/chipset.i | 2 ++ tools/quick_dump/chipset_macro_wrap.c | 5 +++++ tools/quick_dump/quick_dump.py | 2 ++ tools/quick_dump/skylake | 1 + 4 files changed, 10 insertions(+) create mode 100644 tools/quick_dump/skylake diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i index a6fa703..90db40e 100644 --- a/tools/quick_dump/chipset.i +++ b/tools/quick_dump/chipset.i @@ -11,6 +11,7 @@ extern int is_valleyview(unsigned short pciid); extern int is_cherryview(unsigned short pciid); extern int is_haswell(unsigned short pciid); extern int is_broadwell(unsigned short pciid); +extern int is_skylake(unsigned short pciid); extern struct pci_device *intel_get_pci_device(); extern int intel_register_access_init(struct pci_device *pci_dev, int safe); extern uint32_t intel_register_read(uint32_t reg); @@ -28,6 +29,7 @@ extern int is_valleyview(unsigned short pciid); extern int is_cherryview(unsigned short pciid); extern int is_haswell(unsigned short pciid); extern int is_broadwell(unsigned short pciid); +extern int is_skylake(unsigned short pciid); extern struct pci_device *intel_get_pci_device(); extern int intel_register_access_init(struct pci_device *pci_dev, int safe); extern uint32_t intel_register_read(uint32_t reg); diff --git a/tools/quick_dump/chipset_macro_wrap.c b/tools/quick_dump/chipset_macro_wrap.c index 862281e..7b67340 100644 --- a/tools/quick_dump/chipset_macro_wrap.c +++ b/tools/quick_dump/chipset_macro_wrap.c @@ -33,6 +33,11 @@ int is_broadwell(unsigned short pciid) return IS_BROADWELL(pciid); } +int is_skylake(unsigned short pciid) +{ + return IS_SKYLAKE(pciid); +} + /* Simple helper because I couldn't make this work in the script */ unsigned short pcidev_to_devid(struct pci_device *pdev) { diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py index 46e883e..702a9d5 100755 --- a/tools/quick_dump/quick_dump.py +++ b/tools/quick_dump/quick_dump.py @@ -72,6 +72,8 @@ def autodetect_chipset(): return open('haswell', 'r') elif chipset.is_broadwell(devid): return open('broadwell', 'r') + elif chipset.is_skylake(devid): + return open('skylake', 'r') else: print("Autodetect of devid " + hex(devid) + " failed") return None diff --git a/tools/quick_dump/skylake b/tools/quick_dump/skylake new file mode 100644 index 0000000..95baca1 --- /dev/null +++ b/tools/quick_dump/skylake @@ -0,0 +1 @@ +skl_display.txt -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms 2014-10-06 17:56 [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 2/3] quick_dump/skl: Add some display registers Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 3/3] quick_dump/skl: Make quick_dump SKL aware Damien Lespiau @ 2014-10-07 10:26 ` Ville Syrjälä 2014-10-08 9:31 ` Damien Lespiau 2 siblings, 1 reply; 5+ messages in thread From: Ville Syrjälä @ 2014-10-07 10:26 UTC (permalink / raw) To: Damien Lespiau; +Cc: intel-gfx On Mon, Oct 06, 2014 at 06:56:43PM +0100, Damien Lespiau wrote: > SKL will have a whole separate display regs file, so merge > base_display.txt into each platform file. Please drop it from vlv/chv. It's not appropriate for those platforms. > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > --- > tools/quick_dump/broadwell | 1 + > tools/quick_dump/cherryview | 1 + > tools/quick_dump/{base_display.txt => common_display.txt} | 0 > tools/quick_dump/haswell | 1 + > tools/quick_dump/ivybridge | 1 + > tools/quick_dump/sandybridge | 1 + > tools/quick_dump/valleyview | 1 + > 7 files changed, 6 insertions(+) > rename tools/quick_dump/{base_display.txt => common_display.txt} (100%) > > diff --git a/tools/quick_dump/broadwell b/tools/quick_dump/broadwell > index 35c5cc7..7888a36 100644 > --- a/tools/quick_dump/broadwell > +++ b/tools/quick_dump/broadwell > @@ -1,3 +1,4 @@ > +common_display.txt > gen7_other.txt > haswell_other.txt > gen8_interrupt.txt > diff --git a/tools/quick_dump/cherryview b/tools/quick_dump/cherryview > index a86abe2..069dc86 100644 > --- a/tools/quick_dump/cherryview > +++ b/tools/quick_dump/cherryview > @@ -1,3 +1,4 @@ > +common_display.txt > vlv_pipe_a.txt > vlv_pipe_b.txt > chv_pipe_c.txt > diff --git a/tools/quick_dump/base_display.txt b/tools/quick_dump/common_display.txt > similarity index 100% > rename from tools/quick_dump/base_display.txt > rename to tools/quick_dump/common_display.txt > diff --git a/tools/quick_dump/haswell b/tools/quick_dump/haswell > index d449843..94ffb7c 100644 > --- a/tools/quick_dump/haswell > +++ b/tools/quick_dump/haswell > @@ -1,3 +1,4 @@ > +common_display.txt > gen7_other.txt > haswell_other.txt > audio_config_haswell_plus.txt > diff --git a/tools/quick_dump/ivybridge b/tools/quick_dump/ivybridge > index 4637b42..79bda9b 100644 > --- a/tools/quick_dump/ivybridge > +++ b/tools/quick_dump/ivybridge > @@ -1 +1,2 @@ > +common_display.txt > gen7_other.txt > diff --git a/tools/quick_dump/sandybridge b/tools/quick_dump/sandybridge > index 6ece0fd..a0a4474 100644 > --- a/tools/quick_dump/sandybridge > +++ b/tools/quick_dump/sandybridge > @@ -1 +1,2 @@ > +common_display.txt > gen6_other.txt > diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview > index 2611a98..64f0cac 100644 > --- a/tools/quick_dump/valleyview > +++ b/tools/quick_dump/valleyview > @@ -1,3 +1,4 @@ > +common_display.txt > vlv_pipe_a.txt > vlv_pipe_b.txt > vlv_display_base.txt > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms 2014-10-07 10:26 ` [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Ville Syrjälä @ 2014-10-08 9:31 ` Damien Lespiau 0 siblings, 0 replies; 5+ messages in thread From: Damien Lespiau @ 2014-10-08 9:31 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx On Tue, Oct 07, 2014 at 01:26:37PM +0300, Ville Syrjälä wrote: > On Mon, Oct 06, 2014 at 06:56:43PM +0100, Damien Lespiau wrote: > > SKL will have a whole separate display regs file, so merge > > base_display.txt into each platform file. > > Please drop it from vlv/chv. It's not appropriate for those platforms. Ah I wondered about that and decided to not break the existing stuff (to maintain the possibility to diff without noise). But if you're happy with dropping that, I certainly am as well. Pushed the corresponding commit. -- Damien ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2014-10-08 9:31 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-10-06 17:56 [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 2/3] quick_dump/skl: Add some display registers Damien Lespiau 2014-10-06 17:56 ` [PATCH i-g-t 3/3] quick_dump/skl: Make quick_dump SKL aware Damien Lespiau 2014-10-07 10:26 ` [PATCH i-g-t 1/3] quick_dump: Move base_display.txt to indivual platforms Ville Syrjälä 2014-10-08 9:31 ` Damien Lespiau
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