All of lore.kernel.org
 help / color / mirror / Atom feed
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Kevin Cernekee <cernekee@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	linux-sh@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Maxime Bizon <mbizon@freebox.fr>, Jonas Gorski <jogo@openwrt.org>,
	Linux MIPS Mailing List <linux-mips@linux-mips.org>,
	nicolas.ferre@atmel.com, Olof Johansson <olof@lixom.net>,
	Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors
Date: Tue, 11 Nov 2014 11:03:08 +0100	[thread overview]
Message-ID: <20141111110308.5bf7bbef@bbrezillon> (raw)
In-Reply-To: <20141110230301.GV4068@piout.net>

Hi,

On Tue, 11 Nov 2014 00:03:01 +0100
Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:

> Adding Boris in Cc: as he wrote that part.

Thanks for putting me in the loop.

> 
> On 10/11/2014 at 14:11:44 -0800, Kevin Cernekee wrote :
> > On Mon, Nov 10, 2014 at 2:00 PM, Kevin Hilman <khilman@kernel.org> wrote:
> > > Kevin Cernekee <cernekee@gmail.com> writes:
> > >
> > >> Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
> > >> the irqchip.
> > >>
> > >> Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
> > >
> > > I bisected a couple ARM boot failures in next-20141110 on atmel sama5 platforms down to
> > > this patch, though I'm not quite yet sure how it's causing the failure.
> > > I'm not getting any console output, so haven't been able to dig deeper
> > > yet.  Maybe the atmel maintainers (Cc'd) can help dig.
> > >
> > > I've confirmed that reverting $SUBJECT patch (commit
> > > b79055952badbd73710685643bab44104f2509ea2) on top of next-20141110 gets
> > > things booting again.
> > >
> > > Also, it only happens with sama5_defconfig, not with multi_v7_defconfig.
> > 
> > In drivers/irqchip/irq-atmel-aic-common.c I see:
> > 
> >         ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
> >                                              handle_level_irq, 0, 0,
> >                                              IRQCHIP_SKIP_SET_WAKE);
> > 
> > and IRQCHIP_SKIP_SET_WAKE is (1 << 4), same as IRQ_GC_BE_IO.
> > 
> > Is it possible that the caller is passing values intended for
> > irq_chip->flags into a function expecting
> > irq_domain_chip_generic->gc_flags ?

Indeed, I don't know what I tried to do in the first place but this is
completely wrong.
First because the last argument is not a valid flag as you pointed out,
then because I clearly have set irq_set_wake and thus setting
IRQCHIP_SKIP_SET_WAKE makes no sense.

I also realized I should directly pass handle_fasteoi_irq and not
handle_level_irq for the handler, that clr flags (IRQ_NOREQUEST |
IRQ_NOPROBE | IRQ_NOAUTOEN) are missing and that IRQ_GC_INIT_MASK_CACHE
is missing too.

I'll propose a patch fixing all those bugs.

Sorry for the inconvenience :-(.

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Kevin Cernekee <cernekee@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	linux-sh@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Maxime Bizon <mbizon@freebox.fr>, Jonas Gorski <jogo@openwrt.org>,
	Linux MIPS Mailing List <linux-mips@linux-mips.org>,
	nicolas.ferre@atmel.com, Olof Johansson <olof@lixom.net>,
	Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors
Date: Tue, 11 Nov 2014 10:03:08 +0000	[thread overview]
Message-ID: <20141111110308.5bf7bbef@bbrezillon> (raw)
In-Reply-To: <20141110230301.GV4068@piout.net>

Hi,

On Tue, 11 Nov 2014 00:03:01 +0100
Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:

> Adding Boris in Cc: as he wrote that part.

Thanks for putting me in the loop.

> 
> On 10/11/2014 at 14:11:44 -0800, Kevin Cernekee wrote :
> > On Mon, Nov 10, 2014 at 2:00 PM, Kevin Hilman <khilman@kernel.org> wrote:
> > > Kevin Cernekee <cernekee@gmail.com> writes:
> > >
> > >> Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
> > >> the irqchip.
> > >>
> > >> Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
> > >
> > > I bisected a couple ARM boot failures in next-20141110 on atmel sama5 platforms down to
> > > this patch, though I'm not quite yet sure how it's causing the failure.
> > > I'm not getting any console output, so haven't been able to dig deeper
> > > yet.  Maybe the atmel maintainers (Cc'd) can help dig.
> > >
> > > I've confirmed that reverting $SUBJECT patch (commit
> > > b79055952badbd73710685643bab44104f2509ea2) on top of next-20141110 gets
> > > things booting again.
> > >
> > > Also, it only happens with sama5_defconfig, not with multi_v7_defconfig.
> > 
> > In drivers/irqchip/irq-atmel-aic-common.c I see:
> > 
> >         ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
> >                                              handle_level_irq, 0, 0,
> >                                              IRQCHIP_SKIP_SET_WAKE);
> > 
> > and IRQCHIP_SKIP_SET_WAKE is (1 << 4), same as IRQ_GC_BE_IO.
> > 
> > Is it possible that the caller is passing values intended for
> > irq_chip->flags into a function expecting
> > irq_domain_chip_generic->gc_flags ?

Indeed, I don't know what I tried to do in the first place but this is
completely wrong.
First because the last argument is not a valid flag as you pointed out,
then because I clearly have set irq_set_wake and thus setting
IRQCHIP_SKIP_SET_WAKE makes no sense.

I also realized I should directly pass handle_fasteoi_irq and not
handle_level_irq for the handler, that clr flags (IRQ_NOREQUEST |
IRQ_NOPROBE | IRQ_NOAUTOEN) are missing and that IRQ_GC_INIT_MASK_CACHE
is missing too.

I'll propose a patch fixing all those bugs.

Sorry for the inconvenience :-(.

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

  reply	other threads:[~2014-11-11 10:03 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-07  6:44 [PATCH V4 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Kevin Cernekee
2014-11-07  6:44 ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 01/14] sh: Eliminate unused irq_reg_{readl,writel} accessors Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-10  8:13   ` Geert Uytterhoeven
2014-11-10  8:13     ` Geert Uytterhoeven
2014-11-14 16:38     ` Ralf Baechle
2014-11-14 16:38       ` Ralf Baechle
2014-11-14 17:05       ` Jason Cooper
2014-11-14 17:05         ` Jason Cooper
2014-11-16  9:34         ` Geert Uytterhoeven
2014-11-16  9:34           ` Geert Uytterhoeven
2015-01-19 19:13           ` Geert Uytterhoeven
2015-01-19 19:13             ` Geert Uytterhoeven
2015-01-24 17:51             ` Thomas Gleixner
2015-01-24 17:51               ` Thomas Gleixner
2015-01-25 10:13               ` Geert Uytterhoeven
2015-01-25 10:13                 ` Geert Uytterhoeven
2014-11-07  6:44 ` [PATCH V4 02/14] genirq: Generic chip: Change irq_reg_{readl,writel} arguments Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 03/14] genirq: Generic chip: Allow irqchip drivers to override irq_reg_{readl,writel} Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-10 22:00   ` Kevin Hilman
2014-11-10 22:00     ` Kevin Hilman
2014-11-10 22:00     ` Kevin Hilman
2014-11-10 22:11     ` Kevin Cernekee
2014-11-10 22:11       ` Kevin Cernekee
2014-11-10 23:03       ` Alexandre Belloni
2014-11-10 23:03         ` Alexandre Belloni
2014-11-11 10:03         ` Boris Brezillon [this message]
2014-11-11 10:03           ` Boris Brezillon
2014-11-11 13:33         ` [PATCH] irqchip: atmel-aic: fix irqdomain initialization Boris Brezillon
2014-11-11 13:33           ` Boris Brezillon
2014-11-11 15:45           ` Kevin Hilman
2014-11-11 15:45             ` Kevin Hilman
2014-11-11 22:58           ` Jason Cooper
2014-11-11 22:58             ` Jason Cooper
2014-11-12  9:43             ` Boris Brezillon
2014-11-12  9:43               ` Boris Brezillon
2014-11-12  9:43               ` Boris Brezillon
2014-11-07  6:44 ` [PATCH V4 05/14] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 06/14] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 07/14] irqchip: bcm7120-l2, brcmstb-l2: Remove ARM Kconfig dependency Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 08/14] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 09/14] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 10/14] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 11/14] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 12/14] irqchip: bcm7120-l2: Decouple driver from brcmstb-l2 Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 13/14] irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel} Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 14/14] irqchip: brcmstb-l2: " Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07  6:44   ` Kevin Cernekee
2014-11-07 12:27 ` [PATCH V4 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Jason Cooper
2014-11-07 12:27   ` Jason Cooper
2014-11-09  4:30   ` Jason Cooper
2014-11-09  4:30     ` Jason Cooper
2014-11-09  4:30     ` Jason Cooper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20141111110308.5bf7bbef@bbrezillon \
    --to=boris.brezillon@free-electrons.com \
    --cc=alexandre.belloni@free-electrons.com \
    --cc=arnd@arndb.de \
    --cc=cernekee@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=f.fainelli@gmail.com \
    --cc=jason@lakedaemon.net \
    --cc=jogo@openwrt.org \
    --cc=khilman@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=linux-sh@vger.kernel.org \
    --cc=mbizon@freebox.fr \
    --cc=nicolas.ferre@atmel.com \
    --cc=olof@lixom.net \
    --cc=ralf@linux-mips.org \
    --cc=sergei.shtylyov@cogentembedded.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.